From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94739C3271E for ; Mon, 8 Jul 2024 11:43:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=DUWXs/4qqq90erCpNEoSD8BtZwh2dy0/u9m00J8FeCY=; b=ogh6rtXsXLXMbfx+pDQ0iELnys SkCMFDG6nlNwRCZYVTGRCDYPEmUc4CIHgRQH0mW1VSEvwi+Xv24jpYQ00lFA/sMwPC2v8w4wWzJk3 NWuPKnohDyHVIWPz9TQ4A8Zet4GkQ9OlypIIRk2cmRh1SHZezqrPts3HpjN1DUhwzEvJjXJBsapiE ZtwtaFNU9vzzgexrhLu0iH7JmKaeN9mvscWqnYrLcfgbijYoSLC2ZC+2dO9IdPVb7B3CsMAcEmlU5 r08Ut1DHVSh+T8wnRaFqUL6hc7Y7BYS1q8f/Kaf4rXqVf+j1vGUL4Zm2qnj/p1/Nd3+/9gEuYiPGF HQxyZXAg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sQmmb-00000003cnQ-1cxl; Mon, 08 Jul 2024 11:43:49 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sQmmM-00000003cjY-0eCY for linux-arm-kernel@lists.infradead.org; Mon, 08 Jul 2024 11:43:35 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 81C66CE0A88; Mon, 8 Jul 2024 11:43:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D3A21C116B1; Mon, 8 Jul 2024 11:43:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720439011; bh=2HJqA3UYL1Y6HCS7ga10SfSmRMoaswl1N5DsLcp+awg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=uLILdPZZOLFeAvb3zjcq4ZCNtiL5hYMwZevVlpPdqQdZ180LyImyrUUEvInyRHLhi xjUyiTYDq6FJr3WgD4r/E0BjaBQJzib0qxQUieTaDRNNPCZOrH5jba1Dp8nuQTlkh8 vgOTI0NBWMASGF71p9X3tzEujI3KEmiFb34y19UO57NtHcSqTRrSlmt8RKPuhGXoEx sF0EC7fybGftpoO4isux/zjh2woHTnJePC+vXhe7dtSL54p4pXwc6ngDDHy+zffWIB LEQtpu2mP9S4ZLmRtHaW0Cj5xZ77EcfH35we+t7X+l4OAn3kV9aBmleGTonYuhW+hl iRMBJaC8mVVdg== Date: Mon, 8 Jul 2024 12:43:26 +0100 From: Will Deacon To: Nicolin Chen Cc: robin.murphy@arm.com, joro@8bytes.org, jgg@nvidia.com, thierry.reding@gmail.com, vdumpa@nvidia.com, jonathanh@nvidia.com, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org Subject: Re: [PATCH v9 4/6] iommu/arm-smmu-v3: Add CS_NONE quirk for CONFIG_TEGRA241_CMDQV Message-ID: <20240708114326.GE11567@willie-the-truck> References: <20240702174307.GB4740@willie-the-truck> <20240702184942.GD5167@willie-the-truck> <20240705152721.GA9485@willie-the-truck> <20240708112928.GB11567@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240708112928.GB11567@willie-the-truck> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240708_044334_387234_FED9F548 X-CRM114-Status: GOOD ( 15.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jul 08, 2024 at 12:29:28PM +0100, Will Deacon wrote: > On Fri, Jul 05, 2024 at 11:10:42AM -0700, Nicolin Chen wrote: > > But if you insist on having an smmu option, we still have to take in the > > PATCH-3 in this series, enforcing an arm_smmu_cmdq_build_sync_cmd() call > > in the IRQ handler too. So, it would eventually look like [attachment]. > > With my hacks, I think you can just call arm_smmu_cmdq_build_sync_cmd() > from the irqhandler and it will work. Hmm, actually, that will mean we end up using MSIs for the error case on hardware which supports it, which is a strange change in behaviour. What does your hardware do if it sees SIG_SEV in a CMD_SYNC? Is it just a case of failing to generate the event on completion, or does it treat it as an invalid opcode? Will