[PATCH v4 0/3] pwm: meson: add pwm support for A1

[PATCH v4 0/3] pwm: meson: add pwm support for A1

[George Stark]

Add support for Amlogic meson A1 SoC family PWM

Changes in v2:
  add patch with optional power-domains to pwm bindings;
  fix syntax in a1 bindigns patch:
  - use enum over const for amlogic,meson-a1-pwm beacuse adding more devices here
    are expected
  - leave only base compatible amlogic,meson-s4-pwm in check section
  dt_binding_check and dtbs_check run ok now;
  previous version: [1]

Changes in v3:
  squash power-domains patch into main bindigns patch
  add conditional to bindings that power-domains property is required only for a1
  previous version: [2]

Changes in v4:
  split bindings patch into power-domains patch and new compatible patch
  previous version: [3]

[1] https://lore.kernel.org/lkml/20240701130113.433169-3-gnstark@salutedevices.com/T/
[2] https://lore.kernel.org/lkml/20240701172016.523402-1-gnstark@salutedevices.com/T/
[3] https://lore.kernel.org/lkml/20240702123425.584610-1-gnstark@salutedevices.com/T/

George Stark (3):
  dt-bindings: pwm: amlogic: Add optional power-domains
  dt-bindings: pwm: amlogic: Add new bindings for meson A1 PWM
  arm64: dts: meson: a1: add definitions for meson PWM

 .../devicetree/bindings/pwm/pwm-amlogic.yaml  |  17 ++
 arch/arm64/boot/dts/amlogic/meson-a1.dtsi     | 215 ++++++++++++++++++
 2 files changed, 232 insertions(+)

--
2.25.1

[PATCH v4 1/3] dt-bindings: pwm: amlogic: Add optional power-domains

[George Stark]

On newer SoCs, the PWM hardware can require a power domain to operate
so add corresponding optional property.

Signed-off-by: George Stark <gnstark@salutedevices.com>
---
 Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
index 1d71d4f8f328..267908c2bf7b 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
+++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
@@ -56,6 +56,9 @@ properties:
     minItems: 1
     maxItems: 2
 
+  power-domains:
+    maxItems: 1
+
   "#pwm-cells":
     const: 3
 
-- 
2.25.1

[PATCH v4 2/3] dt-bindings: pwm: amlogic: Add new bindings for meson A1 PWM

[George Stark]

The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF.

Signed-off-by: George Stark <gnstark@salutedevices.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
---
 .../devicetree/bindings/pwm/pwm-amlogic.yaml       | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
index 267908c2bf7b..e021cf59421a 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
+++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
@@ -37,6 +37,10 @@ properties:
       - enum:
           - amlogic,meson8-pwm-v2
           - amlogic,meson-s4-pwm
+      - items:
+          - enum:
+              - amlogic,meson-a1-pwm
+          - const: amlogic,meson-s4-pwm
       - items:
           - enum:
               - amlogic,meson8b-pwm-v2
@@ -139,6 +143,16 @@ allOf:
       required:
         - clocks
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - amlogic,meson-a1-pwm
+    then:
+      required:
+        - power-domains
+
 additionalProperties: false
 
 examples:
-- 
2.25.1

Re: [PATCH v4 2/3] dt-bindings: pwm: amlogic: Add new bindings for meson A1 PWM

[Rob Herring]

On Thu, Jul 11, 2024 at 02:41:15AM +0300, George Stark wrote:
> The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF.
> 
> Signed-off-by: George Stark <gnstark@salutedevices.com>
> Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>

Missing ack from Conor. When you submit new versions, it is your 
responsibility to add tags.

> ---
>  .../devicetree/bindings/pwm/pwm-amlogic.yaml       | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)

Re: [PATCH v4 2/3] dt-bindings: pwm: amlogic: Add new bindings for meson A1 PWM

[George Stark]

Hello Rob, Conor

On 7/12/24 15:52, Rob Herring wrote:
> On Thu, Jul 11, 2024 at 02:41:15AM +0300, George Stark wrote:
>> The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF.
>>
>> Signed-off-by: George Stark <gnstark@salutedevices.com>
>> Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> 
> Missing ack from Conor. When you submit new versions, it is your
> responsibility to add tags.

I had Conor's ack in my mind but his response was related to the
squashed patch (a1 compatible + power domains) and the current patch was
a bit different that's why I didn't dare to add the ack.

Conor, do you mind if I resend this patch (and may be [PATCH v4 1/3])
with your ack?

> 
>> ---
>>   .../devicetree/bindings/pwm/pwm-amlogic.yaml       | 14 ++++++++++++++
>>   1 file changed, 14 insertions(+)

-- 
Best regards
George

Re: [PATCH v4 2/3] dt-bindings: pwm: amlogic: Add new bindings for meson A1 PWM

[Conor Dooley]

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On Fri, Jul 12, 2024 at 06:12:26PM +0300, George Stark wrote:
> Hello Rob, Conor
> 
> On 7/12/24 15:52, Rob Herring wrote:
> > On Thu, Jul 11, 2024 at 02:41:15AM +0300, George Stark wrote:
> > > The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF.
> > > 
> > > Signed-off-by: George Stark <gnstark@salutedevices.com>
> > > Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> > 
> > Missing ack from Conor. When you submit new versions, it is your
> > responsibility to add tags.
> 
> I had Conor's ack in my mind but his response was related to the
> squashed patch (a1 compatible + power domains) and the current patch was
> a bit different that's why I didn't dare to add the ack.
> 
> Conor, do you mind if I resend this patch (and may be [PATCH v4 1/3])
> with your ack?

Ye, both are fine :+1:

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Re: [PATCH v4 2/3] dt-bindings: pwm: amlogic: Add new bindings for meson A1 PWM

[Uwe Kleine-König]

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On Thu, Jul 25, 2024 at 03:08:53PM +0100, Conor Dooley wrote:
> On Fri, Jul 12, 2024 at 06:12:26PM +0300, George Stark wrote:
> > Hello Rob, Conor
> > 
> > On 7/12/24 15:52, Rob Herring wrote:
> > > On Thu, Jul 11, 2024 at 02:41:15AM +0300, George Stark wrote:
> > > > The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF.
> > > > 
> > > > Signed-off-by: George Stark <gnstark@salutedevices.com>
> > > > Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> > > 
> > > Missing ack from Conor. When you submit new versions, it is your
> > > responsibility to add tags.
> > 
> > I had Conor's ack in my mind but his response was related to the
> > squashed patch (a1 compatible + power domains) and the current patch was
> > a bit different that's why I didn't dare to add the ack.
> > 
> > Conor, do you mind if I resend this patch (and may be [PATCH v4 1/3])
> > with your ack?
> 
> Ye, both are fine :+1:

I interpreted that as an ack for patches 1 and 2 and applied these to
https://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux.git pwm/for-next
. I guess that interpretation is fine, please tell me if not.

Best regards
Uwe

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Re: [PATCH v4 2/3] dt-bindings: pwm: amlogic: Add new bindings for meson A1 PWM

[Conor Dooley]

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On Tue, Sep 10, 2024 at 10:01:39AM +0200, Uwe Kleine-König wrote:
> On Thu, Jul 25, 2024 at 03:08:53PM +0100, Conor Dooley wrote:
> > On Fri, Jul 12, 2024 at 06:12:26PM +0300, George Stark wrote:
> > > Hello Rob, Conor
> > > 
> > > On 7/12/24 15:52, Rob Herring wrote:
> > > > On Thu, Jul 11, 2024 at 02:41:15AM +0300, George Stark wrote:
> > > > > The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF.
> > > > > 
> > > > > Signed-off-by: George Stark <gnstark@salutedevices.com>
> > > > > Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> > > > 
> > > > Missing ack from Conor. When you submit new versions, it is your
> > > > responsibility to add tags.
> > > 
> > > I had Conor's ack in my mind but his response was related to the
> > > squashed patch (a1 compatible + power domains) and the current patch was
> > > a bit different that's why I didn't dare to add the ack.
> > > 
> > > Conor, do you mind if I resend this patch (and may be [PATCH v4 1/3])
> > > with your ack?
> > 
> > Ye, both are fine :+1:
> 
> I interpreted that as an ack for patches 1 and 2 and applied these to
> https://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux.git pwm/for-next
> . I guess that interpretation is fine, please tell me if not.

Yah, I was okaying my ack being added to both patches in a resend.

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[PATCH v4 3/3] arm64: dts: meson: a1: add definitions for meson PWM

[George Stark]

The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF those
can be connected to various digital I/O pins.

Each of 6 PWM is driven by individually selected clock parent and
8-bit divider. The PWM signal is generated using two 16-bit counters.

Signed-off-by: George Stark <gnstark@salutedevices.com>
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
---
 arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 215 ++++++++++++++++++++++
 1 file changed, 215 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
index 85e56c021e99..0dc39fb8f59d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -307,6 +307,188 @@ mux {
 					};
 				};
 
+				pwm_a_pins1: pwm-a-pins1 {
+					mux {
+						groups = "pwm_a_x6";
+						function = "pwm_a";
+					};
+				};
+
+				pwm_a_pins2: pwm-a-pins2 {
+					mux {
+						groups = "pwm_a_x7";
+						function = "pwm_a";
+					};
+				};
+
+				pwm_a_pins3: pwm-a-pins3 {
+					mux {
+						groups = "pwm_a_f10";
+						function = "pwm_a";
+					};
+				};
+
+				pwm_a_pins4: pwm-a-pins4 {
+					mux {
+						groups = "pwm_a_f6";
+						function = "pwm_a";
+					};
+				};
+
+				pwm_a_pins5: pwm-a-pins5 {
+					mux {
+						groups = "pwm_a_a";
+						function = "pwm_a";
+					};
+				};
+
+				pwm_b_pins1: pwm-b-pins1 {
+					mux {
+						groups = "pwm_b_x";
+						function = "pwm_b";
+					};
+				};
+
+				pwm_b_pins2: pwm-b-pins2 {
+					mux {
+						groups = "pwm_b_f";
+						function = "pwm_b";
+					};
+				};
+
+				pwm_b_pins3: pwm-b-pins3 {
+					mux {
+						groups = "pwm_b_a";
+						function = "pwm_b";
+					};
+				};
+
+				pwm_c_pins1: pwm-c-pins1 {
+					mux {
+						groups = "pwm_c_x";
+						function = "pwm_c";
+					};
+				};
+
+				pwm_c_pins2: pwm-c-pins2 {
+					mux {
+						groups = "pwm_c_f3";
+						function = "pwm_c";
+					};
+				};
+
+				pwm_c_pins3: pwm-c-pins3 {
+					mux {
+						groups = "pwm_c_f8";
+						function = "pwm_c";
+					};
+				};
+
+				pwm_c_pins4: pwm-c-pins4 {
+					mux {
+						groups = "pwm_c_a";
+						function = "pwm_c";
+					};
+				};
+
+				pwm_d_pins1: pwm-d-pins1 {
+					mux {
+						groups = "pwm_d_x15";
+						function = "pwm_d";
+					};
+				};
+
+				pwm_d_pins2: pwm-d-pins2 {
+					mux {
+						groups = "pwm_d_x13";
+						function = "pwm_d";
+					};
+				};
+
+				pwm_d_pins3: pwm-d-pins3 {
+					mux {
+						groups = "pwm_d_x10";
+						function = "pwm_d";
+					};
+				};
+
+				pwm_d_pins4: pwm-d-pins4 {
+					mux {
+						groups = "pwm_d_f";
+						function = "pwm_d";
+					};
+				};
+
+				pwm_e_pins1: pwm-e-pins1 {
+					mux {
+						groups = "pwm_e_p";
+						function = "pwm_e";
+					};
+				};
+
+				pwm_e_pins2: pwm-e-pins2 {
+					mux {
+						groups = "pwm_e_x16";
+						function = "pwm_e";
+					};
+				};
+
+				pwm_e_pins3: pwm-e-pins3 {
+					mux {
+						groups = "pwm_e_x14";
+						function = "pwm_e";
+					};
+				};
+
+				pwm_e_pins4: pwm-e-pins4 {
+					mux {
+						groups = "pwm_e_x2";
+						function = "pwm_e";
+					};
+				};
+
+				pwm_e_pins5: pwm-e-pins5 {
+					mux {
+						groups = "pwm_e_f";
+						function = "pwm_e";
+					};
+				};
+
+				pwm_e_pins6: pwm-e-pins6 {
+					mux {
+						groups = "pwm_e_a";
+						function = "pwm_e";
+					};
+				};
+
+				pwm_f_pins1: pwm-f-pins1 {
+					mux {
+						groups = "pwm_f_b";
+						function = "pwm_f";
+					};
+				};
+
+				pwm_f_pins2: pwm-f-pins2 {
+					mux {
+						groups = "pwm_f_x";
+						function = "pwm_f";
+					};
+				};
+
+				pwm_f_pins3: pwm-f-pins3 {
+					mux {
+						groups = "pwm_f_f4";
+						function = "pwm_f";
+					};
+				};
+
+				pwm_f_pins4: pwm-f-pins4 {
+					mux {
+						groups = "pwm_f_f12";
+						function = "pwm_f";
+					};
+				};
+
 				sdio_pins: sdio {
 					mux0 {
 						groups = "sdcard_d0_x",
@@ -648,6 +830,28 @@ uart_AO_B: serial@2000 {
 				status = "disabled";
 			};
 
+			pwm_ab: pwm@2400 {
+				compatible = "amlogic,meson-a1-pwm",
+					     "amlogic,meson-s4-pwm";
+				reg = <0x0 0x2400 0x0 0x24>;
+				#pwm-cells = <3>;
+				clocks = <&clkc_periphs CLKID_PWM_A>,
+					 <&clkc_periphs CLKID_PWM_B>;
+				power-domains = <&pwrc PWRC_I2C_ID>;
+				status = "disabled";
+			};
+
+			pwm_cd: pwm@2800 {
+				compatible = "amlogic,meson-a1-pwm",
+					     "amlogic,meson-s4-pwm";
+				reg = <0x0 0x2800 0x0 0x24>;
+				#pwm-cells = <3>;
+				clocks = <&clkc_periphs CLKID_PWM_C>,
+					 <&clkc_periphs CLKID_PWM_D>;
+				power-domains = <&pwrc PWRC_I2C_ID>;
+				status = "disabled";
+			};
+
 			saradc: adc@2c00 {
 				compatible = "amlogic,meson-g12a-saradc",
 					"amlogic,meson-saradc";
@@ -732,6 +936,17 @@ sec_AO: ao-secure@5a20 {
 				amlogic,has-chip-id;
 			};
 
+			pwm_ef: pwm@5400 {
+				compatible = "amlogic,meson-a1-pwm",
+					     "amlogic,meson-s4-pwm";
+				reg = <0x0 0x5400 0x0 0x24>;
+				#pwm-cells = <3>;
+				clocks = <&clkc_periphs CLKID_PWM_E>,
+					 <&clkc_periphs CLKID_PWM_F>;
+				power-domains = <&pwrc PWRC_I2C_ID>;
+				status = "disabled";
+			};
+
 			clkc_pll: pll-clock-controller@7c80 {
 				compatible = "amlogic,a1-pll-clkc";
 				reg = <0 0x7c80 0 0x18c>;
-- 
2.25.1

Re: [PATCH v4 3/3] arm64: dts: meson: a1: add definitions for meson PWM

[George Stark]

Hello Neil

Please take a look at this patch. Appropriate bindings were merged recently.


On 7/11/24 02:41, George Stark wrote:
> The chip has 3 dual-channel PWM modules PWM_AB, PWM_CD, PWM_EF those
> can be connected to various digital I/O pins.
> 
> Each of 6 PWM is driven by individually selected clock parent and
> 8-bit divider. The PWM signal is generated using two 16-bit counters.
> 
> Signed-off-by: George Stark <gnstark@salutedevices.com>
> Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> ---
>   arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 215 ++++++++++++++++++++++
>   1 file changed, 215 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> index 85e56c021e99..0dc39fb8f59d 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
> @@ -307,6 +307,188 @@ mux {
>   					};
>   				};
>   
> +				pwm_a_pins1: pwm-a-pins1 {
> +					mux {
> +						groups = "pwm_a_x6";
> +						function = "pwm_a";
> +					};
> +				};
> +
> +				pwm_a_pins2: pwm-a-pins2 {
> +					mux {
> +						groups = "pwm_a_x7";
> +						function = "pwm_a";
> +					};
> +				};
> +
> +				pwm_a_pins3: pwm-a-pins3 {
> +					mux {
> +						groups = "pwm_a_f10";
> +						function = "pwm_a";
> +					};
> +				};
> +
> +				pwm_a_pins4: pwm-a-pins4 {
> +					mux {
> +						groups = "pwm_a_f6";
> +						function = "pwm_a";
> +					};
> +				};
> +
> +				pwm_a_pins5: pwm-a-pins5 {
> +					mux {
> +						groups = "pwm_a_a";
> +						function = "pwm_a";
> +					};
> +				};
> +
> +				pwm_b_pins1: pwm-b-pins1 {
> +					mux {
> +						groups = "pwm_b_x";
> +						function = "pwm_b";
> +					};
> +				};
> +
> +				pwm_b_pins2: pwm-b-pins2 {
> +					mux {
> +						groups = "pwm_b_f";
> +						function = "pwm_b";
> +					};
> +				};
> +
> +				pwm_b_pins3: pwm-b-pins3 {
> +					mux {
> +						groups = "pwm_b_a";
> +						function = "pwm_b";
> +					};
> +				};
> +
> +				pwm_c_pins1: pwm-c-pins1 {
> +					mux {
> +						groups = "pwm_c_x";
> +						function = "pwm_c";
> +					};
> +				};
> +
> +				pwm_c_pins2: pwm-c-pins2 {
> +					mux {
> +						groups = "pwm_c_f3";
> +						function = "pwm_c";
> +					};
> +				};
> +
> +				pwm_c_pins3: pwm-c-pins3 {
> +					mux {
> +						groups = "pwm_c_f8";
> +						function = "pwm_c";
> +					};
> +				};
> +
> +				pwm_c_pins4: pwm-c-pins4 {
> +					mux {
> +						groups = "pwm_c_a";
> +						function = "pwm_c";
> +					};
> +				};
> +
> +				pwm_d_pins1: pwm-d-pins1 {
> +					mux {
> +						groups = "pwm_d_x15";
> +						function = "pwm_d";
> +					};
> +				};
> +
> +				pwm_d_pins2: pwm-d-pins2 {
> +					mux {
> +						groups = "pwm_d_x13";
> +						function = "pwm_d";
> +					};
> +				};
> +
> +				pwm_d_pins3: pwm-d-pins3 {
> +					mux {
> +						groups = "pwm_d_x10";
> +						function = "pwm_d";
> +					};
> +				};
> +
> +				pwm_d_pins4: pwm-d-pins4 {
> +					mux {
> +						groups = "pwm_d_f";
> +						function = "pwm_d";
> +					};
> +				};
> +
> +				pwm_e_pins1: pwm-e-pins1 {
> +					mux {
> +						groups = "pwm_e_p";
> +						function = "pwm_e";
> +					};
> +				};
> +
> +				pwm_e_pins2: pwm-e-pins2 {
> +					mux {
> +						groups = "pwm_e_x16";
> +						function = "pwm_e";
> +					};
> +				};
> +
> +				pwm_e_pins3: pwm-e-pins3 {
> +					mux {
> +						groups = "pwm_e_x14";
> +						function = "pwm_e";
> +					};
> +				};
> +
> +				pwm_e_pins4: pwm-e-pins4 {
> +					mux {
> +						groups = "pwm_e_x2";
> +						function = "pwm_e";
> +					};
> +				};
> +
> +				pwm_e_pins5: pwm-e-pins5 {
> +					mux {
> +						groups = "pwm_e_f";
> +						function = "pwm_e";
> +					};
> +				};
> +
> +				pwm_e_pins6: pwm-e-pins6 {
> +					mux {
> +						groups = "pwm_e_a";
> +						function = "pwm_e";
> +					};
> +				};
> +
> +				pwm_f_pins1: pwm-f-pins1 {
> +					mux {
> +						groups = "pwm_f_b";
> +						function = "pwm_f";
> +					};
> +				};
> +
> +				pwm_f_pins2: pwm-f-pins2 {
> +					mux {
> +						groups = "pwm_f_x";
> +						function = "pwm_f";
> +					};
> +				};
> +
> +				pwm_f_pins3: pwm-f-pins3 {
> +					mux {
> +						groups = "pwm_f_f4";
> +						function = "pwm_f";
> +					};
> +				};
> +
> +				pwm_f_pins4: pwm-f-pins4 {
> +					mux {
> +						groups = "pwm_f_f12";
> +						function = "pwm_f";
> +					};
> +				};
> +
>   				sdio_pins: sdio {
>   					mux0 {
>   						groups = "sdcard_d0_x",
> @@ -648,6 +830,28 @@ uart_AO_B: serial@2000 {
>   				status = "disabled";
>   			};
>   
> +			pwm_ab: pwm@2400 {
> +				compatible = "amlogic,meson-a1-pwm",
> +					     "amlogic,meson-s4-pwm";
> +				reg = <0x0 0x2400 0x0 0x24>;
> +				#pwm-cells = <3>;
> +				clocks = <&clkc_periphs CLKID_PWM_A>,
> +					 <&clkc_periphs CLKID_PWM_B>;
> +				power-domains = <&pwrc PWRC_I2C_ID>;
> +				status = "disabled";
> +			};
> +
> +			pwm_cd: pwm@2800 {
> +				compatible = "amlogic,meson-a1-pwm",
> +					     "amlogic,meson-s4-pwm";
> +				reg = <0x0 0x2800 0x0 0x24>;
> +				#pwm-cells = <3>;
> +				clocks = <&clkc_periphs CLKID_PWM_C>,
> +					 <&clkc_periphs CLKID_PWM_D>;
> +				power-domains = <&pwrc PWRC_I2C_ID>;
> +				status = "disabled";
> +			};
> +
>   			saradc: adc@2c00 {
>   				compatible = "amlogic,meson-g12a-saradc",
>   					"amlogic,meson-saradc";
> @@ -732,6 +936,17 @@ sec_AO: ao-secure@5a20 {
>   				amlogic,has-chip-id;
>   			};
>   
> +			pwm_ef: pwm@5400 {
> +				compatible = "amlogic,meson-a1-pwm",
> +					     "amlogic,meson-s4-pwm";
> +				reg = <0x0 0x5400 0x0 0x24>;
> +				#pwm-cells = <3>;
> +				clocks = <&clkc_periphs CLKID_PWM_E>,
> +					 <&clkc_periphs CLKID_PWM_F>;
> +				power-domains = <&pwrc PWRC_I2C_ID>;
> +				status = "disabled";
> +			};
> +
>   			clkc_pll: pll-clock-controller@7c80 {
>   				compatible = "amlogic,a1-pll-clkc";
>   				reg = <0 0x7c80 0 0x18c>;

-- 
Best regards
George

Re: [PATCH v4 0/3] pwm: meson: add pwm support for A1

[George Stark]

Hello

Excuse me, should I fix/improve anything on this series?

On 7/11/24 02:41, George Stark wrote:
> Add support for Amlogic meson A1 SoC family PWM
> 
> Changes in v2:
>    add patch with optional power-domains to pwm bindings;
>    fix syntax in a1 bindigns patch:
>    - use enum over const for amlogic,meson-a1-pwm beacuse adding more devices here
>      are expected
>    - leave only base compatible amlogic,meson-s4-pwm in check section
>    dt_binding_check and dtbs_check run ok now;
>    previous version: [1]
> 
> Changes in v3:
>    squash power-domains patch into main bindigns patch
>    add conditional to bindings that power-domains property is required only for a1
>    previous version: [2]
> 
> Changes in v4:
>    split bindings patch into power-domains patch and new compatible patch
>    previous version: [3]
> 
> [1] https://lore.kernel.org/lkml/20240701130113.433169-3-gnstark@salutedevices.com/T/
> [2] https://lore.kernel.org/lkml/20240701172016.523402-1-gnstark@salutedevices.com/T/
> [3] https://lore.kernel.org/lkml/20240702123425.584610-1-gnstark@salutedevices.com/T/
> 
> George Stark (3):
>    dt-bindings: pwm: amlogic: Add optional power-domains
>    dt-bindings: pwm: amlogic: Add new bindings for meson A1 PWM
>    arm64: dts: meson: a1: add definitions for meson PWM
> 
>   .../devicetree/bindings/pwm/pwm-amlogic.yaml  |  17 ++
>   arch/arm64/boot/dts/amlogic/meson-a1.dtsi     | 215 ++++++++++++++++++
>   2 files changed, 232 insertions(+)
> 
> --
> 2.25.1
> 

-- 
Best regards
George

Re: [PATCH v4 0/3] pwm: meson: add pwm support for A1

[Uwe Kleine-König]

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Hello George,

On Thu, Jul 18, 2024 at 04:09:04PM +0300, George Stark wrote:
> Excuse me, should I fix/improve anything on this series?

The known issue with this series is just that it's one of several patch
series that I didn't come around to review yet. I tackle them one at a
time, usually in a FIFO order as listed on
https://patchwork.ozlabs.org/project/linux-pwm/list/ .

Best regards
Uwe

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Re: [PATCH v4 0/3] pwm: meson: add pwm support for A1

[George Stark]

On 7/19/24 10:20, Uwe Kleine-König wrote:
> Hello George,
> 
> On Thu, Jul 18, 2024 at 04:09:04PM +0300, George Stark wrote:
>> Excuse me, should I fix/improve anything on this series?
> 
> The known issue with this series is just that it's one of several patch
> series that I didn't come around to review yet. I tackle them one at a
> time, usually in a FIFO order as listed on
> https://patchwork.ozlabs.org/project/linux-pwm/list/ .
> 
> Best regards
> Uwe

Hello Uwe

Ok, no problem. Thanks for letting me know.

-- 
Best regards
George

Re: (subset) [PATCH v4 0/3] pwm: meson: add pwm support for A1

[Neil Armstrong]

Hi,

On Thu, 11 Jul 2024 02:41:13 +0300, George Stark wrote:
> Add support for Amlogic meson A1 SoC family PWM
> 
> Changes in v2:
>   add patch with optional power-domains to pwm bindings;
>   fix syntax in a1 bindigns patch:
>   - use enum over const for amlogic,meson-a1-pwm beacuse adding more devices here
>     are expected
>   - leave only base compatible amlogic,meson-s4-pwm in check section
>   dt_binding_check and dtbs_check run ok now;
>   previous version: [1]
> 
> [...]

Thanks, Applied to https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git (v6.13/arm64-dt)

[3/3] arm64: dts: meson: a1: add definitions for meson PWM
      https://git.kernel.org/amlogic/c/b7e5f4bb555ba1d4fdad6f94eb6ab9f8d9c63597

These changes has been applied on the intermediate git tree [1].

The v6.13/arm64-dt branch will then be sent via a formal Pull Request to the Linux SoC maintainers
for inclusion in their intermediate git branches in order to be sent to Linus during
the next merge window, or sooner if it's a set of fixes.

In the cases of fixes, those will be merged in the current release candidate
kernel and as soon they appear on the Linux master branch they will be
backported to the previous Stable and Long-Stable kernels [2].

The intermediate git branches are merged daily in the linux-next tree [3],
people are encouraged testing these pre-release kernels and report issues on the
relevant mailing-lists.

If problems are discovered on those changes, please submit a signed-off-by revert
patch followed by a corrective changeset.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux.git
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git

-- 
Neil