From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AEDA6C2BD09 for ; Fri, 12 Jul 2024 14:07:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=tLwjQQJ+Q9IS64zwhMLVf50qeQeqqCkMgQ1skibQ5kk=; b=hMHoplbeuQH46XET6qZ9KNnnAk em8fEdN0ItZKOnJmc+fB9S5CKYKGl3oK5FZh/6hOlsk508fKjrw/t+/kodM/9BiwcehQtY/Rz+NQo OlPJQdsq1VpPuffyiybRcRU6IyafASwt0mZEnexuBx4zH+L3NggAPozWWtj2iPcYu7na7Yw6hd+fC O2gYmJROEZzvpA6399VqI4ktVGvTw5L4H7l67mk+CDTmwo2meDOrJo3KBi8ogonSjKxE8f2rpxROE EVHCqIuTx0QGX7iKJmGkg0VcVixYIYfDpBlqAQbWRT4w0cQtyMhRWUwjUU9/dEg3hSu/hwM7BGDyy AuAh3SrQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sSGvN-00000000GZs-2YtL; Fri, 12 Jul 2024 14:07:01 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sSGv1-00000000GSM-40yD for linux-arm-kernel@lists.infradead.org; Fri, 12 Jul 2024 14:06:42 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 876A8CE19B7; Fri, 12 Jul 2024 14:06:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4C1F4C32782; Fri, 12 Jul 2024 14:06:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1720793195; bh=WPERRxXlbQFKhcwOK8ZIyfxpsLzkQC4aKZvfMn+JrAE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=s/YM1oucc/pGbGd9GyTbAZ3r9Es5qx6j9iFxYX66g0MxRgNZtK8bT4LFKhRPRPK+I JayOFdCtjDVvQwhEiqZLeEaKU/4V/a7QcmRcHtnAn+tysmjdn7hsmu76wrcu7RiSz9 lw2etQ5gPlvLZ22OT4BsLi4G5UK+vuTFbjUyzaokd9UJ/SWFC7BiOuHxURgBtrC8xb FPDaGn0ojNrMLYyhjGM3zFm7UI/aDefDKzgjcqy7SUYHJS4T7JTtE9VVsox5Og3eLG a+CRBdL8K52UUFa9wzN4P4RECa0ivj68kmbflQ29loDzokNN3zCy5Wt8S0zjrL7236 3tWII4eBFHSGQ== Date: Fri, 12 Jul 2024 08:06:34 -0600 From: Rob Herring To: Frank Li Cc: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Philipp Zabel , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Liu Ying Subject: Re: [PATCH 2/3] pwm: imx27: Add 32k clock for pwm in i.MX8QXP MIPI subsystem Message-ID: <20240712140634.GA595171-robh@kernel.org> References: <20240711-pwm-v1-0-4d5766f99b8b@nxp.com> <20240711-pwm-v1-2-4d5766f99b8b@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240711-pwm-v1-2-4d5766f99b8b@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240712_070640_381887_B971C502 X-CRM114-Status: GOOD ( 22.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Jul 11, 2024 at 05:08:57PM -0400, Frank Li wrote: > From: Liu Ying > > PWM in i.MX8QXP MIPI subsystem needs the clock '32k'. Use it if the DTS > provides that. > > Signed-off-by: Liu Ying > Signed-off-by: Frank Li > --- > drivers/pwm/pwm-imx27.c | 33 ++++++++++++++++++++++++++++----- > 1 file changed, 28 insertions(+), 5 deletions(-) > > diff --git a/drivers/pwm/pwm-imx27.c b/drivers/pwm/pwm-imx27.c > index 9e2bbf5b4a8ce..032bce7d1fdd3 100644 > --- a/drivers/pwm/pwm-imx27.c > +++ b/drivers/pwm/pwm-imx27.c > @@ -15,6 +15,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -82,6 +83,7 @@ > struct pwm_imx27_chip { > struct clk *clk_ipg; > struct clk *clk_per; > + struct clk *clk_32k; > void __iomem *mmio_base; > > /* > @@ -101,23 +103,36 @@ static int pwm_imx27_clk_prepare_enable(struct pwm_imx27_chip *imx) > { > int ret; > > + if (imx->clk_32k) { > + ret = clk_prepare_enable(imx->clk_32k); IIRC, no need for the 'if' here. clk_prepare_enable() returns success for a NULL clock which is what devm_clk_get_optional() returns if the clock doesn't exist. > + if (ret) > + goto err1; > + } > + > ret = clk_prepare_enable(imx->clk_ipg); > if (ret) > - return ret; > + goto err2; > > ret = clk_prepare_enable(imx->clk_per); > - if (ret) { > - clk_disable_unprepare(imx->clk_ipg); > - return ret; > - } > + if (ret) > + goto err3; > > return 0; > +err3: > + clk_disable_unprepare(imx->clk_ipg); > +err2: > + if (imx->clk_32k) > + clk_disable_unprepare(imx->clk_32k); > +err1: > + return ret; > } > > static void pwm_imx27_clk_disable_unprepare(struct pwm_imx27_chip *imx) > { > clk_disable_unprepare(imx->clk_per); > clk_disable_unprepare(imx->clk_ipg); > + if (imx->clk_32k) > + clk_disable_unprepare(imx->clk_32k); Same here. > } > > static int pwm_imx27_get_state(struct pwm_chip *chip, > @@ -223,6 +238,7 @@ static int pwm_imx27_apply(struct pwm_chip *chip, struct pwm_device *pwm, > struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip); > unsigned long long c; > unsigned long long clkrate; > + int val; Goes in next patch. > int ret; > u32 cr; > > @@ -325,6 +341,13 @@ static int pwm_imx27_probe(struct platform_device *pdev) > return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_per), > "failed to get peripheral clock\n"); > > + imx->clk_32k = devm_clk_get_optional(&pdev->dev, "32k"); > + if (IS_ERR(imx->clk_32k)) { > + dev_err(&pdev->dev, "getting 32k clock failed with %ld\n", > + PTR_ERR(imx->clk_32k)); dev_err_probe. > + return PTR_ERR(imx->clk_32k); > + } > + > chip->ops = &pwm_imx27_ops; > > imx->mmio_base = devm_platform_ioremap_resource(pdev, 0); > > -- > 2.34.1 >