From: Rob Herring <robh@kernel.org>
To: Pankaj Gupta <pankaj.gupta@nxp.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc
Date: Fri, 12 Jul 2024 12:03:58 -0600 [thread overview]
Message-ID: <20240712180358.GA1286437-robh@kernel.org> (raw)
In-Reply-To: <20240712-imx-se-if-v5-2-66a79903a872@nxp.com>
On Fri, Jul 12, 2024 at 11:49:57AM +0530, Pankaj Gupta wrote:
> The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X etc.,
> creates an embedded secure enclave within the SoC boundary to enable
> features like:
> - HSM
> - SHE
> - V2X
>
> Secure-Enclave(s) communication interface are typically via message
> unit, i.e., based on mailbox linux kernel driver. This driver enables
> communication ensuring well defined message sequence protocol between
> Application Core and enclave's firmware.
>
> Driver configures multiple misc-device on the MU, for multiple
> user-space applications, to be able to communicate over single MU.
>
> It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
>
> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
> ---
> .../devicetree/bindings/firmware/fsl,imx-se.yaml | 111 +++++++++++++++++++++
> 1 file changed, 111 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> new file mode 100644
> index 000000000000..bd99505de6e6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> @@ -0,0 +1,111 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/fsl,imx-se.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
> +
> +maintainers:
> + - Pankaj Gupta <pankaj.gupta@nxp.com>
> +
> +description: |
> + NXP's SoC may contain one or multiple embedded secure-enclave HW
> + IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
> + enables features like
> + - Hardware Security Module (HSM),
> + - Security Hardware Extension (SHE), and
> + - Vehicular to Anything (V2X)
> +
> + Communication interface to the secure-enclaves is based on the
> + messaging unit(s).
> +
> +properties:
> + $nodename:
> + pattern: "firmware@[0-9a-f]+$"
> +
> + compatible:
> + enum:
> + - fsl,imx8ulp-se
> + - fsl,imx93-se
> + - fsl,imx95-se
> +
> + reg:
> + maxItems: 1
> + description: Identifier of the communication interface to secure-enclave.
I don't understand what this is. How does someone determine what the
value should be? Are there constraints on the values?
> +
> + mboxes:
> + items:
> + - description: mailbox phandle to send message to se firmware
"mailbox phandle to " is redundant. Drop.
> + - description: mailbox phandle to receive message from se firmware
> +
> + mbox-names:
> + description: two names are to be listed, one for rx and other one for tx.
> + The name can be any of the below list.
I think this can be dropped. The schema says all this.
> + items:
> + - const: tx
> + - const: rx
> +
> + memory-region:
> + items:
> + - description: The phandle to the reserved external memory, the only
> + accessible memoryregion to secure enclave(SE) firmware. It is an
> + optional property based on compatible.
> + (see bindings/reserved-memory/reserved-memory.txt)
Drop. 'maxItems: 1' is sufficient.
> +
> + sram:
> + items:
> + - description: It is an optional property based on compatible.
Drop. 'maxItems: 1' is sufficient.
> +
> +required:
> + - compatible
> + - reg
> + - mboxes
> + - mbox-names
> +
> +allOf:
> + # memory-region
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - fsl,imx8ulp-se
> + - fsl,imx93-se
> + then:
> + required:
> + - memory-region
> + else:
> + properties:
> + memory-region: false
> +
> + # sram
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - fsl,imx8ulp-se
> + then:
> + required:
> + - sram
> +
> + else:
> + properties:
> + sram: false
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + firmware {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + firmware@0 {
> + compatible = "fsl,imx95-se";
> + reg = <0x0>;
> + mboxes = <&ele_mu0 0 0>, <&ele_mu0 1 0>;
> + mbox-names = "tx", "rx";
> + };
> + };
> +...
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2024-07-12 18:04 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-12 6:19 [PATCH v5 0/5] Changes in v5: Pankaj Gupta
2024-07-12 6:19 ` [PATCH v5 1/5] Documentation/firmware: add imx/se to other_interfaces Pankaj Gupta
2024-07-12 6:19 ` [PATCH v5 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc Pankaj Gupta
2024-07-12 18:03 ` Rob Herring [this message]
2024-07-15 7:56 ` [EXT] " Pankaj Gupta
2024-07-18 5:11 ` Pankaj Gupta
2024-07-19 10:08 ` Pankaj Gupta
2024-07-12 6:19 ` [PATCH v5 3/5] arm64: dts: imx8ulp-evk: add nxp secure enclave firmware Pankaj Gupta
2024-07-12 6:19 ` [PATCH v5 4/5] firmware: imx: add driver for NXP EdgeLock Enclave Pankaj Gupta
2024-07-12 18:42 ` Markus Elfring
2024-07-13 17:56 ` Amit Singh Tomar
2024-07-15 9:02 ` [EXT] " Pankaj Gupta
2024-07-16 3:20 ` Amit Singh Tomar
2024-07-12 6:20 ` [PATCH v5 5/5] firmware: imx: adds miscdev Pankaj Gupta
2024-07-12 22:19 ` Frank Li
2024-07-15 10:56 ` Sascha Hauer
2024-07-16 4:50 ` Pankaj Gupta
2024-07-16 12:54 ` Fabio Estevam
2024-07-15 7:24 ` Amit Singh Tomar
2024-07-15 9:03 ` [EXT] " Pankaj Gupta
2024-07-16 3:30 ` Amit Singh Tomar
2024-07-12 18:15 ` [PATCH v5 0/5] Changes in v5: Markus Elfring
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