From: "Marek Behún" <kabel@kernel.org>
To: "Andrew Lunn" <andrew@lunn.ch>,
"Gregory Clement" <gregory.clement@bootlin.com>,
"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
linux-arm-kernel@lists.infradead.org, arm@kernel.org,
"Andy Shevchenko" <andy@kernel.org>,
"Hans de Goede" <hdegoede@redhat.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: "Marek Behún" <kabel@kernel.org>
Subject: [PATCH 12/13] irqchip/armada-370-xp: Allow mapping only per-CPU interrupts
Date: Mon, 15 Jul 2024 12:51:55 +0200 [thread overview]
Message-ID: <20240715105156.18388-13-kabel@kernel.org> (raw)
In-Reply-To: <20240715105156.18388-1-kabel@kernel.org>
On platforms where MPIC is not the top-level interrupt controller the
driver currently only supports handling of the per-CPU interrupts (the
first 29 interrupts). This is obvious from the code of
mpic_handle_cascade_irq(), where we read only one cause register.
Bound the number of available interrupts in the IRQ domain to 29 for
these platforms.
The corresponding device-trees refer only to per-CPU interrupts via
MPIC, the other interrupts are referred to via GIC.
Signed-off-by: Marek Behún <kabel@kernel.org>
---
drivers/irqchip/irq-armada-370-xp.c | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 1db9160da20a..3cae6ceacc73 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -858,6 +858,19 @@ static int __init mpic_of_init(struct device_node *node,
for (irq_hw_number_t i = 0; i < nr_irqs; i++)
writel(i, mpic->base + MPIC_INT_CLEAR_ENABLE);
+ /*
+ * Initialize mpic->parent_irq before calling any other functions, since
+ * it is used to distinguish between IPI and non-IPI platforms.
+ */
+ mpic->parent_irq = irq_of_parse_and_map(node, 0);
+
+ /*
+ * On non-IPI platforms the driver currently supports only the per-CPU
+ * interrupts (the first 29 interrupts). See mpic_handle_cascade_irq().
+ */
+ if (!mpic_is_ipi_available(mpic))
+ nr_irqs = MPIC_PER_CPU_IRQS_NR;
+
mpic->domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, mpic);
if (!mpic->domain) {
pr_err("%pOF: Unable to add IRQ domain\n", node);
@@ -866,12 +879,6 @@ static int __init mpic_of_init(struct device_node *node,
irq_domain_update_bus_token(mpic->domain, DOMAIN_BUS_WIRED);
- /*
- * Initialize mpic->parent_irq before calling any other functions, since
- * it is used to distinguish between IPI and non-IPI platforms.
- */
- mpic->parent_irq = irq_of_parse_and_map(node, 0);
-
/* Setup for the boot CPU */
mpic_perf_init(mpic);
mpic_smp_cpu_init(mpic);
--
2.44.2
next prev parent reply other threads:[~2024-07-15 10:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-15 10:51 [PATCH 00/13] armada-370-xp irqchip updates round 5 Marek Behún
2024-07-15 10:51 ` [PATCH 01/13] irqchip/armada-370-xp: Drop IPI_DOORBELL_START and rename IPI_DOORBELL_END Marek Behún
2024-07-15 10:51 ` [PATCH 02/13] irqchip/armada-370-xp: Drop msi_doorbell_end() Marek Behún
2024-07-15 10:51 ` [PATCH 03/13] irqchip/armada-370-xp: Rename struct irq_domain variables for consistency Marek Behún
2024-07-28 21:41 ` Thomas Gleixner
2024-07-15 10:51 ` [PATCH 04/13] irqchip/armada-370-xp: Add the __init attribute to mpic_msi_init() Marek Behún
2024-07-28 21:42 ` Thomas Gleixner
2024-07-15 10:51 ` [PATCH 05/13] irqchip/armada-370-xp: Put __init attribute after return type in mpic_ipi_init() Marek Behún
2024-07-15 10:51 ` [PATCH 06/13] irqchip/armada-370-xp: Put static variables into driver private structure Marek Behún
2024-07-28 21:44 ` Thomas Gleixner
2024-07-15 10:51 ` [PATCH 07/13] irqchip/armada-370-xp: Put MSI doorbell limits into the mpic structure Marek Behún
2024-07-15 10:51 ` [PATCH 08/13] irqchip/armada-370-xp: Pass around the driver private structure Marek Behún
2024-07-15 10:51 ` [PATCH 09/13] irqchip/armada-370-xp: Dynamically allocate " Marek Behún
2024-07-15 10:51 ` [PATCH 10/13] irqchip/armada-370-xp: Fix reenabling last per-CPU interrupt Marek Behún
2024-07-28 21:47 ` Thomas Gleixner
2024-07-29 13:28 ` Marek Behún
2024-07-29 13:36 ` Thomas Gleixner
2024-07-15 10:51 ` [PATCH 11/13] irqchip/armada-370-xp: Iterate only valid bits of the per-CPU interrupt cause register Marek Behún
2024-07-28 21:53 ` Thomas Gleixner
2024-07-15 10:51 ` Marek Behún [this message]
2024-07-28 21:55 ` [PATCH 12/13] irqchip/armada-370-xp: Allow mapping only per-CPU interrupts Thomas Gleixner
2024-07-15 10:51 ` [PATCH 13/13] irqchip/armada-370-xp: Use the mpic_is_ipi_available() helper in one more case Marek Behún
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