From: Will Deacon <will@kernel.org>
To: Mayank Rana <quic_mrana@quicinc.com>
Cc: lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
bhelgaas@google.com, jingoohan1@gmail.com,
manivannan.sadhasivam@linaro.org, cassel@kernel.org,
yoshihiro.shimoda.uh@renesas.com, s-vadapalli@ti.com,
u.kleine-koenig@pengutronix.de, dlemoal@kernel.org,
amishin@t-argos.ru, thierry.reding@gmail.com,
jonathanh@nvidia.com, Frank.Li@nxp.com,
ilpo.jarvinen@linux.intel.com, vidyas@nvidia.com,
marek.vasut+renesas@gmail.com, krzk+dt@kernel.org,
conor+dt@kernel.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
quic_ramkri@quicinc.com, quic_nkela@quicinc.com,
quic_shazhuss@quicinc.com, quic_msarkar@quicinc.com,
quic_nitegupt@quicinc.com
Subject: Re: [PATCH V2 7/7] PCI: host-generic: Add dwc PCIe controller based MSI controller usage
Date: Tue, 16 Jul 2024 09:58:12 +0100 [thread overview]
Message-ID: <20240716085811.GA19348@willie-the-truck> (raw)
In-Reply-To: <1721067215-5832-8-git-send-email-quic_mrana@quicinc.com>
On Mon, Jul 15, 2024 at 11:13:35AM -0700, Mayank Rana wrote:
> Add usage of Synopsys Designware PCIe controller based MSI controller to
> support MSI functionality with ECAM compliant Synopsys Designware PCIe
> controller. To use this functionality add device compatible string as
> "snps,dw-pcie-ecam-msi".
>
> Signed-off-by: Mayank Rana <quic_mrana@quicinc.com>
> ---
> drivers/pci/controller/pci-host-generic.c | 92 ++++++++++++++++++++++++++++++-
> 1 file changed, 91 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pci/controller/pci-host-generic.c b/drivers/pci/controller/pci-host-generic.c
> index c2c027f..457ae44 100644
> --- a/drivers/pci/controller/pci-host-generic.c
> +++ b/drivers/pci/controller/pci-host-generic.c
> @@ -8,13 +8,73 @@
> * Author: Will Deacon <will.deacon@arm.com>
> */
>
> -#include <linux/kernel.h>
> #include <linux/init.h>
> +#include <linux/kernel.h>
> #include <linux/module.h>
> +#include <linux/of_address.h>
> #include <linux/pci-ecam.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
>
> +#include "dwc/pcie-designware-msi.h"
> +
> +struct dw_ecam_pcie {
> + void __iomem *cfg;
> + struct dw_msi *msi;
> + struct pci_host_bridge *bridge;
> +};
> +
> +static u32 dw_ecam_pcie_readl(void *p_data, u32 reg)
> +{
> + struct dw_ecam_pcie *ecam_pcie = (struct dw_ecam_pcie *)p_data;
> +
> + return readl(ecam_pcie->cfg + reg);
> +}
> +
> +static void dw_ecam_pcie_writel(void *p_data, u32 reg, u32 val)
> +{
> + struct dw_ecam_pcie *ecam_pcie = (struct dw_ecam_pcie *)p_data;
> +
> + writel(val, ecam_pcie->cfg + reg);
> +}
> +
> +static struct dw_ecam_pcie *dw_pcie_ecam_msi(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct dw_ecam_pcie *ecam_pcie;
> + struct dw_msi_ops *msi_ops;
> + u64 addr;
> +
> + ecam_pcie = devm_kzalloc(dev, sizeof(*ecam_pcie), GFP_KERNEL);
> + if (!ecam_pcie)
> + return ERR_PTR(-ENOMEM);
> +
> + if (of_property_read_reg(dev->of_node, 0, &addr, NULL) < 0) {
> + dev_err(dev, "Failed to get reg address\n");
> + return ERR_PTR(-ENODEV);
> + }
> +
> + ecam_pcie->cfg = devm_ioremap(dev, addr, PAGE_SIZE);
> + if (ecam_pcie->cfg == NULL)
> + return ERR_PTR(-ENOMEM);
> +
> + msi_ops = devm_kzalloc(dev, sizeof(*msi_ops), GFP_KERNEL);
> + if (!msi_ops)
> + return ERR_PTR(-ENOMEM);
> +
> + msi_ops->readl_msi = dw_ecam_pcie_readl;
> + msi_ops->writel_msi = dw_ecam_pcie_writel;
> + msi_ops->pp = ecam_pcie;
> + ecam_pcie->msi = dw_pcie_msi_host_init(pdev, msi_ops, 0);
> + if (IS_ERR(ecam_pcie->msi)) {
> + dev_err(dev, "dw_pcie_msi_host_init() failed\n");
> + return ERR_PTR(-EINVAL);
> + }
> +
> + dw_pcie_msi_init(ecam_pcie->msi);
> + return ecam_pcie;
> +}
Hmm. This looks like quite a lot of not-very-generic code to be adding
to pci-host-generic.c. The file is now, what, 50% designware logic?
Will
next prev parent reply other threads:[~2024-07-16 8:58 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-15 18:13 [PATCH V2 0/7] Add power domain and MSI functionality with PCIe host generic ECAM driver Mayank Rana
2024-07-15 18:13 ` [PATCH V2 1/7] PCI: dwc: Move MSI functionality related code to separate file Mayank Rana
2024-07-31 16:40 ` Manivannan Sadhasivam
2024-07-15 18:13 ` [PATCH V222/7] PCI: dwc: Add msi_ops to allow DBI based MSI register access Mayank Rana
2024-07-31 17:17 ` Manivannan Sadhasivam
2024-07-15 18:13 ` [PATCH V2 3/7] PCI: dwc: Add pcie-designware-msi driver related Kconfig option Mayank Rana
2024-07-15 18:39 ` Andrew Lunn
2024-07-16 0:04 ` Mayank Rana
2024-07-15 18:13 ` [PATCH V2 4/7] dt-bindings: PCI: host-generic-pci: Add power-domains related binding Mayank Rana
2024-07-16 7:25 ` Krzysztof Kozlowski
2024-07-16 21:47 ` Mayank Rana
2024-07-15 18:13 ` [PATCH V2 5/7] PCI: host-generic: Add power domain based handling for PCIe controller Mayank Rana
2024-07-15 18:13 ` [PATCH V226/7] dt-bindings: PCI: host-generic-pci: Add snps,dw-pcie-ecam-msi binding Mayank Rana
2024-07-15 19:43 ` Rob Herring (Arm)
2024-07-16 7:28 ` Krzysztof Kozlowski
2024-07-16 22:09 ` Mayank Rana
2024-07-17 6:47 ` Krzysztof Kozlowski
2024-07-17 17:20 ` Mayank Rana
2024-07-18 6:05 ` Krzysztof Kozlowski
2024-07-18 23:19 ` Mayank Rana
2024-07-20 18:30 ` Krzysztof Kozlowski
2024-07-31 17:26 ` Manivannan Sadhasivam
2024-07-15 18:13 ` [PATCH V2 7/7] PCI: host-generic: Add dwc PCIe controller based MSI controller usage Mayank Rana
2024-07-16 8:58 ` Will Deacon [this message]
2024-07-16 13:42 ` Rob Herring
2024-07-16 22:32 ` Mayank Rana
2024-07-23 22:56 ` Mayank Rana
2024-07-24 9:54 ` Manivannan Sadhasivam
2024-07-24 2:13 ` [PATCH V2 0/7] Add power domain and MSI functionality with PCIe host generic ECAM driver Dmitry Baryshkov
2024-07-24 3:58 ` Mayank Rana
2024-07-24 7:12 ` Dmitry Baryshkov
2024-07-24 13:31 ` Manivannan Sadhasivam
2024-07-24 13:34 ` Dmitry Baryshkov
2024-07-24 16:51 ` Mayank Rana
2024-07-29 17:19 ` Mayank Rana
2024-07-30 5:34 ` Manivannan Sadhasivam
2024-07-30 16:16 ` Mayank Rana
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