From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AC7F9C3DA59 for ; Tue, 16 Jul 2024 13:42:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=VZPBesOkS30TDiQ7gzzAFwPXHoFQBvc7P4QXjwC+9Wo=; b=Fh8xZVfXsYnZ+K7ZOWINTs37eP JUKd/tKxHmYj8LBvETWgrqRj19sAYfvKITk8+EhabLeu8CuBBk00xGSU8U9aYgNizCuDBemaEh1ps FhtJ0LyjJ57AtuN2qya0PYFDgyW0nzDqxDgnao12Z0dQdXoH4XD+xR16celW7PM+/3gZ3KnDsi/eY L41oqi42StGeUxE0MDyvbDdL4VF8MkRkKCKHuY922DOzyiEOp+G7A8BnZoAsn0v38XIetgZBZAUer 8vW+U5ggRtXr5BcA4kEqYzRkPuDhCFyTNnUkPTISJH0QB/6yH1ZIcdm3uDv+xidI5CJ5N6ecL7Pfa 6CTnF5dA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTiRv-0000000AaY3-0dmx; Tue, 16 Jul 2024 13:42:35 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTiRa-0000000AaUh-3OwP for linux-arm-kernel@lists.infradead.org; Tue, 16 Jul 2024 13:42:16 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 0443660E93; Tue, 16 Jul 2024 13:42:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7D944C116B1; Tue, 16 Jul 2024 13:42:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721137332; bh=eOH48dunNLTsABrLCx37z6olk5dF9XDyjImDI5wsews=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=utfsRQKUyppf+MLIJiQNb9329FA+IDvzRZijmX6zElfA+9+MuTbJA4R3NFfj+uSqm 6HKw4cF8rGJFPVMkHfBeKScFCoh67hvHKs7WLIhpT+B4vjm8+e2XymYQz3Yxk/qu5s e+wtShgILbTmSc5evNSy5BGcwzanUiEh2MdCQRO6vXpj3PSy84eOuvQeDTC3aS1OXJ aSYE1LXEcc64ihSnKRkzN0vkN8/qPEgKuOmrX9CDtwts8YY97ouKtwW/ZW3S7mPQzY Y/femgch1Z1Dv5U+5G6AK58mvBIUcN7e7Kn3LtprdUUHA41bkrMmjcWa/xLpAT2Vfj 6yu2jjFD/0qzg== Date: Tue, 16 Jul 2024 07:42:10 -0600 From: Rob Herring To: Will Deacon Cc: Mayank Rana , lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com, jingoohan1@gmail.com, manivannan.sadhasivam@linaro.org, cassel@kernel.org, yoshihiro.shimoda.uh@renesas.com, s-vadapalli@ti.com, u.kleine-koenig@pengutronix.de, dlemoal@kernel.org, amishin@t-argos.ru, thierry.reding@gmail.com, jonathanh@nvidia.com, Frank.Li@nxp.com, ilpo.jarvinen@linux.intel.com, vidyas@nvidia.com, marek.vasut+renesas@gmail.com, krzk+dt@kernel.org, conor+dt@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, quic_ramkri@quicinc.com, quic_nkela@quicinc.com, quic_shazhuss@quicinc.com, quic_msarkar@quicinc.com, quic_nitegupt@quicinc.com Subject: Re: [PATCH V2 7/7] PCI: host-generic: Add dwc PCIe controller based MSI controller usage Message-ID: <20240716134210.GA3534018-robh@kernel.org> References: <1721067215-5832-1-git-send-email-quic_mrana@quicinc.com> <1721067215-5832-8-git-send-email-quic_mrana@quicinc.com> <20240716085811.GA19348@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240716085811.GA19348@willie-the-truck> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240716_064215_016681_39655088 X-CRM114-Status: GOOD ( 25.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jul 16, 2024 at 09:58:12AM +0100, Will Deacon wrote: > On Mon, Jul 15, 2024 at 11:13:35AM -0700, Mayank Rana wrote: > > Add usage of Synopsys Designware PCIe controller based MSI controller to > > support MSI functionality with ECAM compliant Synopsys Designware PCIe > > controller. To use this functionality add device compatible string as > > "snps,dw-pcie-ecam-msi". > > > > Signed-off-by: Mayank Rana > > --- > > drivers/pci/controller/pci-host-generic.c | 92 ++++++++++++++++++++++++++++++- > > 1 file changed, 91 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/pci/controller/pci-host-generic.c b/drivers/pci/controller/pci-host-generic.c > > index c2c027f..457ae44 100644 > > --- a/drivers/pci/controller/pci-host-generic.c > > +++ b/drivers/pci/controller/pci-host-generic.c > > @@ -8,13 +8,73 @@ > > * Author: Will Deacon > > */ > > > > -#include > > #include > > +#include > > #include > > +#include > > #include > > #include > > #include > > > > +#include "dwc/pcie-designware-msi.h" > > + > > +struct dw_ecam_pcie { > > + void __iomem *cfg; > > + struct dw_msi *msi; > > + struct pci_host_bridge *bridge; > > +}; > > + > > +static u32 dw_ecam_pcie_readl(void *p_data, u32 reg) > > +{ > > + struct dw_ecam_pcie *ecam_pcie = (struct dw_ecam_pcie *)p_data; > > + > > + return readl(ecam_pcie->cfg + reg); > > +} > > + > > +static void dw_ecam_pcie_writel(void *p_data, u32 reg, u32 val) > > +{ > > + struct dw_ecam_pcie *ecam_pcie = (struct dw_ecam_pcie *)p_data; > > + > > + writel(val, ecam_pcie->cfg + reg); > > +} > > + > > +static struct dw_ecam_pcie *dw_pcie_ecam_msi(struct platform_device *pdev) > > +{ > > + struct device *dev = &pdev->dev; > > + struct dw_ecam_pcie *ecam_pcie; > > + struct dw_msi_ops *msi_ops; > > + u64 addr; > > + > > + ecam_pcie = devm_kzalloc(dev, sizeof(*ecam_pcie), GFP_KERNEL); > > + if (!ecam_pcie) > > + return ERR_PTR(-ENOMEM); > > + > > + if (of_property_read_reg(dev->of_node, 0, &addr, NULL) < 0) { Using this function on MMIO addresses is wrong. It is an untranslated address. > > + dev_err(dev, "Failed to get reg address\n"); > > + return ERR_PTR(-ENODEV); > > + } > > + > > + ecam_pcie->cfg = devm_ioremap(dev, addr, PAGE_SIZE); > > + if (ecam_pcie->cfg == NULL) > > + return ERR_PTR(-ENOMEM); > > + > > + msi_ops = devm_kzalloc(dev, sizeof(*msi_ops), GFP_KERNEL); > > + if (!msi_ops) > > + return ERR_PTR(-ENOMEM); > > + > > + msi_ops->readl_msi = dw_ecam_pcie_readl; > > + msi_ops->writel_msi = dw_ecam_pcie_writel; > > + msi_ops->pp = ecam_pcie; > > + ecam_pcie->msi = dw_pcie_msi_host_init(pdev, msi_ops, 0); > > + if (IS_ERR(ecam_pcie->msi)) { > > + dev_err(dev, "dw_pcie_msi_host_init() failed\n"); > > + return ERR_PTR(-EINVAL); > > + } > > + > > + dw_pcie_msi_init(ecam_pcie->msi); > > + return ecam_pcie; > > +} > > Hmm. This looks like quite a lot of not-very-generic code to be adding > to pci-host-generic.c. The file is now, what, 50% designware logic? Agreed. I would suggest you add ECAM support to the DW/QCom driver reusing some of the common ECAM support code. I suppose another option would be to define a node and driver which is just the DW MSI controller. That might not work given the power domain being added (which is not very generic either). Rob