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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="92K84z8ZDtaxn7PF" Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240724_085454_799450_629ECA13 X-CRM114-Status: GOOD ( 24.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --92K84z8ZDtaxn7PF Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Jul 24, 2024 at 09:30:21AM +0000, Havalige, Thippeswamy wrote: > Hi Conor Dooley, >=20 > > -----Original Message----- > > From: Conor Dooley > > Sent: Monday, July 22, 2024 10:15 PM > > To: Havalige, Thippeswamy > > Cc: lpieralisi@kernel.org; kw@linux.com; robh@kernel.org; > > bhelgaas@google.com; krzk+dt@kernel.org; conor+dt@kernel.org; linux- > > kernel@vger.kernel.org; devicetree@vger.kernel.org; linux- > > pci@vger.kernel.org; Havalige, Thippeswamy > > ; linux-arm-kernel@lists.infradead.org; > > Simek, Michal > > Subject: Re: [PATCH v2 1/2] dt-bindings: PCI: xilinx-xdma: Add schemas = for > > Xilinx QDMA PCIe Root Port Bridge > >=20 > > On Mon, Jul 22, 2024 at 11:55:57AM +0530, Thippeswamy Havalige wrote: > > > Add YAML devicetree schemas for Xilinx QDMA Soft IP PCIe Root Port > > Bridge. > > > > > > Signed-off-by: Thippeswamy Havalige > > > --- > > > .../bindings/pci/xlnx,xdma-host.yaml | 41 +++++++++++++++++= +- > > > 1 file changed, 39 insertions(+), 2 deletions(-) > > > --- > > > changes in v2 > > > - update dt node label with pcie. > > > --- > > > diff --git a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml > > b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml > > > index 2f59b3a73dd2..28d9350a7fb4 100644 > > > --- a/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml > > > +++ b/Documentation/devicetree/bindings/pci/xlnx,xdma-host.yaml > > > @@ -14,10 +14,21 @@ allOf: > > > > > > properties: > > > compatible: > > > - const: xlnx,xdma-host-3.00 > > > + enum: > > > + - xlnx,xdma-host-3.00 > > > + - xlnx,qdma-host-3.00 > > > > > > reg: > > > - maxItems: 1 > > > + items: > > > + - description: configuration region and XDMA bridge register. > > > + - description: QDMA bridge register. > >=20 > > Please constrain the new entry to only the new compatible. > - Thanks, I ll resend patch with required changes. Weird quoting btw, the - isn't needed. > > > + minItems: 1 > > > + > > > + reg-names: > > > + items: > > > + - const: cfg > > > + - const: breg > > > + minItems: 1 > > > > > > ranges: > > > maxItems: 2 > > > @@ -111,4 +122,30 @@ examples: > > > interrupt-controller; > > > }; > > > }; > > > + > > > + pcie@80000000 { > >=20 > > tbh, don't see the point of a new example for this. > - For this in both examples ranges properties are different. So, here I w= anted to make sure that our example device tree bindings work straight forw= ard when our reference designs are used. Different ranges properties doesn't justify a new example. They don't exist to be copy-pasted, but rather to demonstrate usage of properties and validate the binding. --92K84z8ZDtaxn7PF Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZqEjxgAKCRB4tDGHoIJi 0mHhAQCrh5YO1/JZ7IECO37RiQw1DnB5qf7QtbOsQnjjs+GAgAD9GlzOI5vOVD7B 0bjbgj3+TO8fke9IHYGrN1Sdk+aDfAQ= =Ftu/ -----END PGP SIGNATURE----- --92K84z8ZDtaxn7PF--