From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Joey Gouly <joey.gouly@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Przemyslaw Gaj <pgaj@cadence.com>
Subject: [PATCH v2 16/17] KVM: arm64: nv: Plumb handling of AT S1* traps from EL2
Date: Wed, 31 Jul 2024 20:40:29 +0100 [thread overview]
Message-ID: <20240731194030.1991237-17-maz@kernel.org> (raw)
In-Reply-To: <20240731194030.1991237-1-maz@kernel.org>
Hooray, we're done. Plug the AT traps into the system instruction
table, and let it rip.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/sys_regs.c | 45 +++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index e7e5e0df119e..9f3cf82e5231 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2803,6 +2803,36 @@ static const struct sys_reg_desc sys_reg_descs[] = {
EL2_REG(SP_EL2, NULL, reset_unknown, 0),
};
+static bool handle_at_s1e01(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
+ const struct sys_reg_desc *r)
+{
+ u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2);
+
+ __kvm_at_s1e01(vcpu, op, p->regval);
+
+ return true;
+}
+
+static bool handle_at_s1e2(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
+ const struct sys_reg_desc *r)
+{
+ u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2);
+
+ __kvm_at_s1e2(vcpu, op, p->regval);
+
+ return true;
+}
+
+static bool handle_at_s12(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
+ const struct sys_reg_desc *r)
+{
+ u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2);
+
+ __kvm_at_s12(vcpu, op, p->regval);
+
+ return true;
+}
+
static bool kvm_supported_tlbi_s12_op(struct kvm_vcpu *vpcu, u32 instr)
{
struct kvm *kvm = vpcu->kvm;
@@ -3065,6 +3095,14 @@ static struct sys_reg_desc sys_insn_descs[] = {
{ SYS_DESC(SYS_DC_ISW), access_dcsw },
{ SYS_DESC(SYS_DC_IGSW), access_dcgsw },
{ SYS_DESC(SYS_DC_IGDSW), access_dcgsw },
+
+ SYS_INSN(AT_S1E1R, handle_at_s1e01),
+ SYS_INSN(AT_S1E1W, handle_at_s1e01),
+ SYS_INSN(AT_S1E0R, handle_at_s1e01),
+ SYS_INSN(AT_S1E0W, handle_at_s1e01),
+ SYS_INSN(AT_S1E1RP, handle_at_s1e01),
+ SYS_INSN(AT_S1E1WP, handle_at_s1e01),
+
{ SYS_DESC(SYS_DC_CSW), access_dcsw },
{ SYS_DESC(SYS_DC_CGSW), access_dcgsw },
{ SYS_DESC(SYS_DC_CGDSW), access_dcgsw },
@@ -3144,6 +3182,13 @@ static struct sys_reg_desc sys_insn_descs[] = {
SYS_INSN(TLBI_VALE1NXS, handle_tlbi_el1),
SYS_INSN(TLBI_VAALE1NXS, handle_tlbi_el1),
+ SYS_INSN(AT_S1E2R, handle_at_s1e2),
+ SYS_INSN(AT_S1E2W, handle_at_s1e2),
+ SYS_INSN(AT_S12E1R, handle_at_s12),
+ SYS_INSN(AT_S12E1W, handle_at_s12),
+ SYS_INSN(AT_S12E0R, handle_at_s12),
+ SYS_INSN(AT_S12E0W, handle_at_s12),
+
SYS_INSN(TLBI_IPAS2E1IS, handle_ipas2e1is),
SYS_INSN(TLBI_RIPAS2E1IS, handle_ripas2e1is),
SYS_INSN(TLBI_IPAS2LE1IS, handle_ipas2e1is),
--
2.39.2
next prev parent reply other threads:[~2024-07-31 19:47 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-31 19:40 [PATCH v2 00/17] KVM: arm64: nv: Add support for address translation instructions Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 01/17] arm64: Add missing APTable and TCR_ELx.HPD masks Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 02/17] arm64: Add PAR_EL1 field description Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 03/17] arm64: Add system register encoding for PSTATE.PAN Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 04/17] arm64: Add ESR_ELx_FSC_ADDRSZ_L() helper Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 05/17] KVM: arm64: Make kvm_at() take an OP_AT_* Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 06/17] KVM: arm64: nv: Turn upper_attr for S2 walk into the full descriptor Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 07/17] KVM: arm64: nv: Honor absence of FEAT_PAN2 Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 08/17] KVM: arm64: nv: Add basic emulation of AT S1E{0,1}{R,W} Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 09/17] KVM: arm64: nv: Add basic emulation of AT S1E1{R,W}P Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 10/17] KVM: arm64: nv: Add basic emulation of AT S1E2{R,W} Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 11/17] KVM: arm64: nv: Add emulation of AT S12E{0,1}{R,W} Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 12/17] KVM: arm64: nv: Make ps_to_output_size() generally available Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 13/17] KVM: arm64: nv: Add SW walker for AT S1 emulation Marc Zyngier
2024-08-09 12:43 ` Alexandru Elisei
2024-08-10 10:16 ` Marc Zyngier
2024-08-12 15:11 ` Alexandru Elisei
2024-08-12 17:58 ` Marc Zyngier
2024-08-12 18:04 ` Marc Zyngier
2024-08-13 9:17 ` Alexandru Elisei
2024-07-31 19:40 ` [PATCH v2 14/17] KVM: arm64: nv: Sanitise SCTLR_EL1.EPAN according to VM configuration Marc Zyngier
2024-07-31 19:40 ` [PATCH v2 15/17] KVM: arm64: nv: Make AT+PAN instructions aware of FEAT_PAN3 Marc Zyngier
2024-07-31 19:40 ` Marc Zyngier [this message]
2024-07-31 19:40 ` [PATCH v2 17/17] KVM: arm64: nv: Add support for FEAT_ATS1A Marc Zyngier
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