linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Bjorn Helgaas <helgaas@kernel.org>
To: Sunil V L <sunilvl@ventanamicro.com>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>,
	Anup Patel <anup@brainfault.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Samuel Holland <samuel.holland@sifive.com>,
	Robert Moore <robert.moore@intel.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Haibo Xu <haibo1.xu@intel.com>,
	Atish Kumar Patra <atishp@rivosinc.com>,
	Drew Fustini <dfustini@tenstorrent.com>
Subject: Re: [PATCH v7 02/17] ACPI: scan: Add a weak function to reorder the IRQCHIP probe
Date: Wed, 31 Jul 2024 14:41:13 -0500	[thread overview]
Message-ID: <20240731194113.GA77955@bhelgaas> (raw)
In-Reply-To: <20240729142241.733357-3-sunilvl@ventanamicro.com>

On Mon, Jul 29, 2024 at 07:52:24PM +0530, Sunil V L wrote:
> Unlike OF framework, the irqchip probe using IRQCHIP_ACPI_DECLARE has no
> order defined. Depending on the Makefile is not a good idea. So,
> usually it is worked around by mandating only root interrupt controller
> probed using IRQCHIP_ACPI_DECLARE and other interrupt controllers are
> probed via cascade mechanism.
> 
> However, this is also not a clean solution because if there are multiple
> root controllers (ex: RINTC in RISC-V which is per CPU) which need to be
> probed first, then the cascade will happen for every root controller.
> So, introduce a architecture specific weak function to order the probing
> of the interrupt controllers which can be implemented by different
> architectures as per their interrupt controller hierarchy.

Nit: I think it's nice if the commit log and even the subject line
includes the actual *name* of the function being added.

s/a architecture/an architecture/

No need to repost for these.

> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
>  drivers/acpi/scan.c  | 3 +++
>  include/linux/acpi.h | 2 ++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
> index 59771412686b..52a9dfc8e18c 100644
> --- a/drivers/acpi/scan.c
> +++ b/drivers/acpi/scan.c
> @@ -2755,6 +2755,8 @@ static int __init acpi_match_madt(union acpi_subtable_headers *header,
>  	return 0;
>  }
>  
> +void __weak arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr) { }
> +
>  int __init __acpi_probe_device_table(struct acpi_probe_entry *ap_head, int nr)
>  {
>  	int count = 0;
> @@ -2763,6 +2765,7 @@ int __init __acpi_probe_device_table(struct acpi_probe_entry *ap_head, int nr)
>  		return 0;
>  
>  	mutex_lock(&acpi_probe_mutex);
> +	arch_sort_irqchip_probe(ap_head, nr);
>  	for (ape = ap_head; nr; ape++, nr--) {
>  		if (ACPI_COMPARE_NAMESEG(ACPI_SIG_MADT, ape->id)) {
>  			acpi_probe_count = 0;
> diff --git a/include/linux/acpi.h b/include/linux/acpi.h
> index 0687a442fec7..3fff86f95c2f 100644
> --- a/include/linux/acpi.h
> +++ b/include/linux/acpi.h
> @@ -1343,6 +1343,8 @@ struct acpi_probe_entry {
>  	kernel_ulong_t driver_data;
>  };
>  
> +void arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr);
> +
>  #define ACPI_DECLARE_PROBE_ENTRY(table, name, table_id, subtable,	\
>  				 valid, data, fn)			\
>  	static const struct acpi_probe_entry __acpi_probe_##name	\
> -- 
> 2.43.0
> 


  reply	other threads:[~2024-07-31 19:49 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-29 14:22 [PATCH v7 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-07-29 14:22 ` [PATCH v7 01/17] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2024-07-29 14:22 ` [PATCH v7 02/17] ACPI: scan: Add a weak function to reorder the IRQCHIP probe Sunil V L
2024-07-31 19:41   ` Bjorn Helgaas [this message]
2024-07-29 14:22 ` [PATCH v7 03/17] ACPI: bus: Add acpi_riscv_init function Sunil V L
2024-07-31 19:42   ` Bjorn Helgaas
2024-07-29 14:22 ` [PATCH v7 04/17] ACPI: scan: Refactor dependency creation Sunil V L
2024-07-29 14:22 ` [PATCH v7 05/17] ACPI: scan: Add RISC-V interrupt controllers to honor list Sunil V L
2024-07-29 14:22 ` [PATCH v7 06/17] ACPI: scan: Define weak function to populate dependencies Sunil V L
2024-07-29 14:22 ` [PATCH v7 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2024-07-29 14:22 ` [PATCH v7 08/17] ACPI: pci_link: Clear the dependencies after probe Sunil V L
2024-07-31 19:49   ` Bjorn Helgaas
2025-12-01 13:07   ` huyuye
2025-12-01 13:33     ` [PATCH " Sunil V L
2025-12-01 14:12   ` huyuye
2025-12-02  4:28     ` [PATCH " Sunil V L
2024-07-29 14:22 ` [PATCH v7 09/17] ACPI: RISC-V: Implement PCI related functionality Sunil V L
2024-07-29 14:22 ` [PATCH v7 10/17] ACPI: RISC-V: Implement function to reorder irqchip probe entries Sunil V L
2024-07-29 14:22 ` [PATCH v7 11/17] ACPI: RISC-V: Initialize GSI mapping structures Sunil V L
2024-07-29 14:22 ` [PATCH v7 12/17] ACPI: RISC-V: Implement function to add implicit dependencies Sunil V L
2024-07-29 14:22 ` [PATCH v7 13/17] irqchip/riscv-intc: Add ACPI support for AIA Sunil V L
2024-08-06 15:22   ` Anup Patel
2024-07-29 14:22 ` [PATCH v7 14/17] irqchip/riscv-imsic-state: Create separate function for DT Sunil V L
2024-08-06 15:25   ` Anup Patel
2024-07-29 14:22 ` [PATCH v7 15/17] irqchip/riscv-imsic: Add ACPI support Sunil V L
2024-08-06 15:30   ` Anup Patel
2024-07-29 14:22 ` [PATCH v7 16/17] irqchip/riscv-aplic: " Sunil V L
2024-08-06 15:54   ` Anup Patel
2024-07-29 14:22 ` [PATCH v7 17/17] irqchip/sifive-plic: " Sunil V L
2024-08-06 15:59   ` Anup Patel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240731194113.GA77955@bhelgaas \
    --to=helgaas@kernel.org \
    --cc=ajones@ventanamicro.com \
    --cc=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=atishp@rivosinc.com \
    --cc=bhelgaas@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=conor.dooley@microchip.com \
    --cc=dfustini@tenstorrent.com \
    --cc=haibo1.xu@intel.com \
    --cc=lenb@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=rafael@kernel.org \
    --cc=robert.moore@intel.com \
    --cc=samuel.holland@sifive.com \
    --cc=sunilvl@ventanamicro.com \
    --cc=tglx@linutronix.de \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).