From: Jim Quinlan <james.quinlan@broadcom.com>
To: linux-pci@vger.kernel.org,
Nicolas Saenz Julienne <nsaenz@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Cyril Brulebois <kibi@debian.org>,
Stanimir Varbanov <svarbanov@suse.de>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com,
james.quinlan@broadcom.com
Cc: "Florian Fainelli" <florian.fainelli@broadcom.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM
BCM7XXX ARM ARCHITECTURE),
linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM
BCM2711/BCM2835 ARM ARCHITECTURE),
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS),
linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v5 01/12] dt-bindings: PCI: Cleanup of brcmstb YAML and add 7712 SoC
Date: Wed, 31 Jul 2024 18:28:15 -0400 [thread overview]
Message-ID: <20240731222831.14895-2-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20240731222831.14895-1-james.quinlan@broadcom.com>
o Change order of the compatible strings to be alphabetical
o Use "maxItems" where needed.
o Change maintainer: Nicolas has not been active for a while. It also
makes sense for a Broadcom employee to be the maintainer as many of the
details are privy to Broadcom.
Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
---
.../devicetree/bindings/pci/brcm,stb-pcie.yaml | 18 +++++++++++-------
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
index 11f8ea33240c..7d2552192153 100644
--- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Brcmstb PCIe Host Controller
maintainers:
- - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+ - Jim Quinlan <james.quinlan@broadcom.com>
properties:
compatible:
@@ -16,11 +16,11 @@ properties:
- brcm,bcm2711-pcie # The Raspberry Pi 4
- brcm,bcm4908-pcie
- brcm,bcm7211-pcie # Broadcom STB version of RPi4
- - brcm,bcm7278-pcie # Broadcom 7278 Arm
- brcm,bcm7216-pcie # Broadcom 7216 Arm
- - brcm,bcm7445-pcie # Broadcom 7445 Arm
+ - brcm,bcm7278-pcie # Broadcom 7278 Arm
- brcm,bcm7425-pcie # Broadcom 7425 MIPs
- brcm,bcm7435-pcie # Broadcom 7435 MIPs
+ - brcm,bcm7445-pcie # Broadcom 7445 Arm
reg:
maxItems: 1
@@ -95,6 +95,12 @@ properties:
minItems: 1
maxItems: 3
+ resets:
+ maxItems: 1
+
+ reset-names:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -118,8 +124,7 @@ allOf:
then:
properties:
resets:
- items:
- - description: reset controller handling the PERST# signal
+ maxItems: 1
reset-names:
items:
@@ -136,8 +141,7 @@ allOf:
then:
properties:
resets:
- items:
- - description: phandle pointing to the RESCAL reset controller
+ maxItems: 1
reset-names:
items:
--
2.17.1
next prev parent reply other threads:[~2024-07-31 22:29 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-31 22:28 [PATCH v5 00/12] PCI: brcnstb: Enable STB 7712 SOC Jim Quinlan
2024-07-31 22:28 ` Jim Quinlan [this message]
2024-08-01 16:35 ` [PATCH v5 01/12] dt-bindings: PCI: Cleanup of brcmstb YAML and add 7712 SoC Florian Fainelli
2024-08-02 6:43 ` Krzysztof Kozlowski
2024-08-12 22:07 ` Jim Quinlan
2024-08-13 8:27 ` Krzysztof Kozlowski
2024-08-14 17:35 ` Jim Quinlan
2024-08-14 18:05 ` Krzysztof Kozlowski
2024-07-31 22:28 ` [PATCH v5 02/12] dt-bindings: PCI: brcmstb: Add 7712 SoC description Jim Quinlan
2024-08-01 16:36 ` Florian Fainelli
2024-08-02 7:18 ` Krzysztof Kozlowski
2024-07-31 22:28 ` [PATCH v5 03/12] PCI: brcmstb: Use common error handling code in brcm_pcie_probe() Jim Quinlan
2024-08-01 16:37 ` Florian Fainelli
2024-08-07 2:52 ` Manivannan Sadhasivam
2024-08-12 20:12 ` Jim Quinlan
2024-08-07 2:54 ` Manivannan Sadhasivam
2024-08-13 16:45 ` Stanimir Varbanov
2024-08-13 17:06 ` James Quinlan
2024-07-31 22:28 ` [PATCH v5 04/12] PCI: brcmstb: Use bridge reset if available Jim Quinlan
2024-08-01 16:37 ` Florian Fainelli
2024-08-07 2:59 ` Manivannan Sadhasivam
2024-08-09 11:16 ` Stanimir Varbanov
2024-08-12 15:13 ` Jim Quinlan
2024-08-12 15:46 ` Jim Quinlan
2024-08-12 22:28 ` Stanimir Varbanov
2024-08-13 15:46 ` James Quinlan
2024-07-31 22:28 ` [PATCH v5 05/12] PCI: brcmstb: Use swinit " Jim Quinlan
2024-08-01 16:37 ` Florian Fainelli
2024-08-07 3:03 ` Manivannan Sadhasivam
2024-08-12 17:54 ` Jim Quinlan
2024-08-09 9:53 ` Stanimir Varbanov
2024-08-12 13:43 ` Jim Quinlan
2024-08-12 15:57 ` Manivannan Sadhasivam
2024-08-12 22:05 ` Stanimir Varbanov
2024-07-31 22:28 ` [PATCH v5 06/12] PCI: brcmstb: PCI: brcmstb: Make HARD_DEBUG, INTR2_CPU_BASE offsets SoC-specific Jim Quinlan
2024-07-31 22:28 ` [PATCH v5 07/12] PCI: brcmstb: Remove two unused constants from driver Jim Quinlan
2024-07-31 22:28 ` [PATCH v5 08/12] PCI: brcmstb: Don't conflate the reset rescal with phy ctrl Jim Quinlan
2024-08-07 3:05 ` Manivannan Sadhasivam
2024-07-31 22:28 ` [PATCH v5 09/12] PCI: brcmstb: Refactor for chips with many regular inbound windows Jim Quinlan
2024-08-01 16:39 ` Florian Fainelli
2024-08-06 22:58 ` Stanimir Varbanov
2024-08-07 14:04 ` Manivannan Sadhasivam
2024-08-07 14:16 ` Florian Fainelli
2024-08-07 15:03 ` Manivannan Sadhasivam
2024-08-12 19:14 ` Jim Quinlan
2024-07-31 22:28 ` [PATCH v5 10/12] PCI: brcmstb: Check return value of all reset_control_xxx calls Jim Quinlan
2024-08-07 14:11 ` Manivannan Sadhasivam
2024-08-12 18:20 ` Jim Quinlan
2024-07-31 22:28 ` [PATCH v5 11/12] PCI: brcmstb: Change field name from 'type' to 'soc_base' Jim Quinlan
2024-08-01 16:34 ` Florian Fainelli
2024-07-31 22:28 ` [PATCH v5 12/12] PCI: brcmstb: Enable 7712 SOCs Jim Quinlan
2024-08-07 14:12 ` Manivannan Sadhasivam
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