From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8AA95C3DA49 for ; Fri, 2 Aug 2024 10:25:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To: Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=q2xzTAkORBKQo6KBqyWh4ZlelmiqXSoPj0DcSKWyjkE=; b=01hleKOknSL+gUfO3KRB6diydK WIA7quCvOTE8FrH0T0ZBMQ+R0SQTH/tZ7D/02WIIgJA4M8f+JQaE37FsHdrDI1pFmfVPvgUvBTSba RgtQ4xscwqbJLmEskVajHn3f7B5hbj/w2ESHo5j3uqxXfENf+g65sBuRPWzqPEST7KE59s+Sw8ETv j89yLTPbQvScqKTanYrJ0886OnVvr9v45ES3/Pqpzfwu9QV2wcEslyq85YoCCjjSQVtgY1oxtgGvE jkOQdh4LiEMTaSbqFPcs2qFuJWYnGLoNeUUYA0U72OR7B9sXHiRPVh9DImz9rCr4ocVk412eoskjs 7pmIGFFw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZpSl-00000008SAD-3ZM5; Fri, 02 Aug 2024 10:24:43 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZpSC-00000008RuT-01oi for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2024 10:24:09 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 0EFEE60B31; Fri, 2 Aug 2024 10:24:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A3AD6C32782; Fri, 2 Aug 2024 10:24:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1722594246; bh=8/lRbN701cWQ3w4M/QitTPDuCQ96WaFukkxfmlE8Mzk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=YAsxxdcSrNofQrbQy5tZb6HPGJzd01MjTjeYpi/1IUVQrKT960WoGKToMviWTlEaL 43QkLtt05T/dP+y3Oim6DOxUvJ3MBgU+WxeNtMDAz/BGqKBqkAMpsRGVzq4aJbNQbz tQjOKybp61Jhs+GIr3K2s1tC35XNeYu34gTHwD05PEB0AG2arg/zeK1Yr44SEMGk/o WL6ZnBiwfXfWjDVOLcuFa5Nir1so1Dh6ifcXqYxb+ESQjBav+dMzX5SzTrd4C2CwuA SfcKZ2JLehBi3JY9XGXAseLXVLMJgJLfm/lNUR5rXQfLFbQfgtvUWKmTPJr4EpdCUd POVa/Yjg727ng== Date: Fri, 2 Aug 2024 11:24:02 +0100 From: Will Deacon To: Rob Herring Cc: catalin.marinas@arm.com, Mark Rutland , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] perf: arm_pmuv3: Fix chained event check for cycle counter Message-ID: <20240802102401.GA6004@willie-the-truck> References: <20240710182357.3701635-1-robh@kernel.org> <20240801112923.GA4476@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240802_032408_135158_5A4E7775 X-CRM114-Status: GOOD ( 24.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 01, 2024 at 11:19:26AM -0600, Rob Herring wrote: > On Thu, Aug 1, 2024 at 5:29 AM Will Deacon wrote: > > > > On Wed, Jul 10, 2024 at 12:23:56PM -0600, Rob Herring (Arm) wrote: > > > Since commit b7e89b0f5bd7 ("perf: arm_pmu: Remove event index to > > > counter remapping"), armv8pmu_event_is_chained() is incorrectly > > > returning that the cycle counter is chained, but the cycle counter has > > > always been 64-bit. The result is trying to configure counter #30 which > > > typically doesn't exist. > > > > > > As ARMV8_PMU_MAX_GENERAL_COUNTERS is the number of counters (31), the > > > comparison to the counter index needs to be '<' rather than '<='. > > > > > > Fixes: b7e89b0f5bd7 ("perf: arm_pmu: Remove event index to counter remapping") > > > Signed-off-by: Rob Herring (Arm) > > > --- > > > drivers/perf/arm_pmuv3.c | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c > > > index 3b3a3334cc3f..0e22c68fb804 100644 > > > --- a/drivers/perf/arm_pmuv3.c > > > +++ b/drivers/perf/arm_pmuv3.c > > > @@ -482,7 +482,7 @@ static bool armv8pmu_event_is_chained(struct perf_event *event) > > > return !armv8pmu_event_has_user_read(event) && > > > armv8pmu_event_is_64bit(event) && > > > !armv8pmu_has_long_event(cpu_pmu) && > > > - (idx <= ARMV8_PMU_MAX_GENERAL_COUNTERS); > > > + (idx < ARMV8_PMU_MAX_GENERAL_COUNTERS); > > > } > > > > Acked-by: Will Deacon > > > > Catalin -- please can you pick this up as a fix? > > No, this is the fix for what Will dropped and said to resend on the > v9.4 fixed instruction counter series. Here's the series with the fix > in it[1]. Urgh, sorry about that, and thanks for pointing it out. I'd initially marked this as read, but then I was pointed at it the other day and thought I'd missed a fix since "git show b7e89b0f5bd7" still shows the patch, despite pruning the remotes. I'll queue up the other series for 6.12. Will