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From: Xianwei Zhao via B4 Relay <devnull+xianwei.zhao.amlogic.com@kernel.org>
To: Neil Armstrong <neil.armstrong@linaro.org>,
	 Jerome Brunet <jbrunet@baylibre.com>,
	 Michael Turquette <mturquette@baylibre.com>,
	 Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Chuan Liu <chuan.liu@amlogic.com>,
	 Kevin Hilman <khilman@baylibre.com>,
	 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	 linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
	 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	 Xianwei Zhao <xianwei.zhao@amlogic.com>
Subject: [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter
Date: Tue, 06 Aug 2024 18:27:14 +0800	[thread overview]
Message-ID: <20240806-c3_add_node-v1-1-c0de41341632@amlogic.com> (raw)
In-Reply-To: <20240806-c3_add_node-v1-0-c0de41341632@amlogic.com>

From: Xianwei Zhao <xianwei.zhao@amlogic.com>

Add C3 PLL controller input clock parameters "fix".

Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock controller")
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
index 43de3c6fc1cf..700865cc9792 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
+++ b/Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
@@ -24,11 +24,13 @@ properties:
     items:
       - description: input top pll
       - description: input mclk pll
+      - description: input fix pll
 
   clock-names:
     items:
       - const: top
       - const: mclk
+      - const: fix
 
   "#clock-cells":
     const: 1
@@ -52,8 +54,9 @@ examples:
             compatible = "amlogic,c3-pll-clkc";
             reg = <0x0 0x8000 0x0 0x1a4>;
             clocks = <&scmi_clk 2>,
-                     <&scmi_clk 5>;
-            clock-names = "top", "mclk";
+                     <&scmi_clk 5>,
+                     <&scmi_clk 12>;
+            clock-names = "top", "mclk", "fix";
             #clock-cells = <1>;
         };
     };

-- 
2.37.1




  reply	other threads:[~2024-08-06 10:29 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-06 10:27 [PATCH 0/3] add some node for amlogic c3 Xianwei Zhao via B4 Relay
2024-08-06 10:27 ` Xianwei Zhao via B4 Relay [this message]
2024-08-06 13:10   ` [PATCH 1/3] dt-bindings: clock: fix C3 PLL input parameter Krzysztof Kozlowski
2024-08-07  1:55     ` Xianwei Zhao
2024-08-07  5:44       ` Krzysztof Kozlowski
2024-08-07  6:40         ` Xianwei Zhao
2024-08-07  7:01           ` Krzysztof Kozlowski
2024-08-07  7:56         ` Jerome Brunet
2024-08-07  8:07           ` Krzysztof Kozlowski
2024-08-07  8:23           ` Xianwei Zhao
2024-08-06 10:27 ` [PATCH 2/3] arm64: dts: amlogic: add some device nodes for C3 Xianwei Zhao via B4 Relay
2024-08-06 13:13   ` Krzysztof Kozlowski
2024-08-07  5:54     ` Xianwei Zhao
2024-08-07  6:38       ` Krzysztof Kozlowski
2024-08-06 10:27 ` [PATCH 3/3] arm64: dts: amlogic: add C3 AW419 board Xianwei Zhao via B4 Relay
2024-08-06 13:14   ` Krzysztof Kozlowski
2024-08-07  2:37     ` Xianwei Zhao
2024-08-07  5:44       ` Krzysztof Kozlowski
2024-08-07  7:25         ` Xianwei Zhao

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