From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1820BC52D7C for ; Fri, 9 Aug 2024 19:55:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=jAfs7E7C4qvt/q4TSRpfroZeKiK5pHjU9mlSG5Hc18Q=; b=EftuL6q0v5xn9D fFMFS1D7aYbNvXWWIe4QqAQ9ajzROMipy0I0rItlJ5PGZg/XTfalfFLMSNPmhm5yhOBFUwZTZD1jp uBl1ivflaVhaFdnr3kfU2h8T43Xe/qsI/hTAszl0nIRrludOy/GU5V+veWVPbDnwLsSx/UajtEybU NW16cK1BYITdqKg7s3D8dS9EhEtYaOE8sU+RBrrloMa4rbtTRcexYIHKmOJn06mCl5Wcbfv3pYCPq y60P8H1VfXki1hjT2nEj/YTrYizqL8KNeSrfoYIhWW0WWQ2GHrUEZnNXBe1Ur1rPTaJ2McSIquevC uoOXeos/ht8lUO7EASjw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1scVi3-0000000CROK-3GrD; Fri, 09 Aug 2024 19:55:35 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1scVhT-0000000CRI8-2svo for linux-arm-kernel@lists.infradead.org; Fri, 09 Aug 2024 19:55:01 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id C5B0961763; Fri, 9 Aug 2024 19:54:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 35633C32782; Fri, 9 Aug 2024 19:54:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723233298; bh=yxgNLA1ilMmp2a3RrpUb2yDEIuTC6qQGtGFDKIQ4FGU=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=EeYHHjhYyIZf+kA1NCpAC+AgGWlSp4TXAbDOgVzRkGv7AGPs1aNQ7h4PYFzUra8Xd w5kEv+iu3L80j/ZYBnvjhVpoMzQ9rmcKkIWy5Oyei4zPRyrAwn+JOfdYBaA7pQHASy VpBfISBg3C1/VqJAsbLsf2vRrc1qoIdf8TVfXbn/acz4UbAxQEU2rEDqi1BjI/aX5K bDFy/ALq1lKp10QFZBdmBKlueCJopfEebRH3mhFJMMDw6a8CxSKVlYaPjP6q/armsg 8TRmY7HwKZc93qUk5qezpJTPsAwKqSHl3nht9JVYDI27z6g8GMDSwWfZCbCCz6HiUS PcXDoHew5zdUA== Date: Fri, 9 Aug 2024 14:54:55 -0500 From: Bjorn Helgaas To: Sean Anderson Cc: Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org, Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, Markus Elfring , Dan Carpenter , linux-kernel@vger.kernel.org, Bjorn Helgaas , Michal Simek , Bharat Kumar Gogada , Bharat Kumar Gogada , Conor Dooley , Krzysztof Kozlowski , Lorenzo Pieralisi , Michal Simek , devicetree@vger.kernel.org Subject: Re: [PATCH v4 0/7] PCI: xilinx-nwl: Add phy support Message-ID: <20240809195455.GA209828@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240531161337.864994-1-sean.anderson@linux.dev> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240809_125459_817503_76C6C0E7 X-CRM114-Status: GOOD ( 15.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, May 31, 2024 at 12:13:30PM -0400, Sean Anderson wrote: > Add phy subsystem support for the xilinx-nwl PCIe controller. This > series also includes several small fixes and improvements. > > Changes in v4: > - Clarify dt-bindings commit subject/message > - Explain likely effects of the off-by-one error > - Trim down UBSAN backtrace > - Move if to after pci_host_probe > - Remove if in err_phy > - Fix error path in phy_enable skipping the first phy > - Disable phys in reverse order > - Use dev_err instead of WARN for errors > > Changes in v3: > - Document phys property > - Expand off-by-one commit message > > Changes in v2: > - Remove phy-names > - Add an example > - Get phys by index and not by name > > Sean Anderson (7): > dt-bindings: pci: xilinx-nwl: Add phys property > PCI: xilinx-nwl: Fix off-by-one in IRQ handler > PCI: xilinx-nwl: Fix register misspelling > PCI: xilinx-nwl: Rate-limit misc interrupt messages > PCI: xilinx-nwl: Clean up clock on probe failure/removal > PCI: xilinx-nwl: Add phy support Applied the above to pci/controller/xilinx for v6.12, thanks! I assume the DTS update below should go via some other tree, but let me know if I should pick it up. > arm64: zynqmp: Add PCIe phys > > .../bindings/pci/xlnx,nwl-pcie.yaml | 7 + > .../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 1 + > drivers/pci/controller/pcie-xilinx-nwl.c | 139 +++++++++++++++--- > 3 files changed, 124 insertions(+), 23 deletions(-)