From: Sunil V L <sunilvl@ventanamicro.com>
To: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
acpica-devel@lists.linux.dev
Cc: "Will Deacon" <will@kernel.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Len Brown" <lenb@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Anup Patel" <anup@brainfault.org>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Robert Moore" <robert.moore@intel.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Haibo Xu" <haibo1.xu@intel.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Atish Kumar Patra" <atishp@rivosinc.com>,
"Drew Fustini" <dfustini@tenstorrent.com>,
"Sunil V L" <sunilvl@ventanamicro.com>,
"Björn Töpel" <bjorn@rivosinc.com>
Subject: [PATCH v8 03/17] ACPI: bus: Add acpi_riscv_init() function
Date: Mon, 12 Aug 2024 06:29:15 +0530 [thread overview]
Message-ID: <20240812005929.113499-4-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20240812005929.113499-1-sunilvl@ventanamicro.com>
Add a new function for RISC-V to do architecture specific initialization
similar to acpi_arm_init(). Some of the ACPI tables are architecture
specific and there is no reason trying to find them on other
architectures. So, add acpi_riscv_init() similar to acpi_arm_init().
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Tested-by: Björn Töpel <bjorn@rivosinc.com>
---
drivers/acpi/bus.c | 1 +
drivers/acpi/riscv/Makefile | 2 +-
drivers/acpi/riscv/init.c | 11 +++++++++++
include/linux/acpi.h | 6 ++++++
4 files changed, 19 insertions(+), 1 deletion(-)
create mode 100644 drivers/acpi/riscv/init.c
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 284bc2e03580..48d277657203 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -1459,6 +1459,7 @@ static int __init acpi_init(void)
acpi_hest_init();
acpi_ghes_init();
acpi_arm_init();
+ acpi_riscv_init();
acpi_scan_init();
acpi_ec_init();
acpi_debugfs_init();
diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile
index 86b0925f612d..877de00d1b50 100644
--- a/drivers/acpi/riscv/Makefile
+++ b/drivers/acpi/riscv/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
-obj-y += rhct.o
+obj-y += rhct.o init.o
obj-$(CONFIG_ACPI_PROCESSOR_IDLE) += cpuidle.o
obj-$(CONFIG_ACPI_CPPC_LIB) += cppc.o
diff --git a/drivers/acpi/riscv/init.c b/drivers/acpi/riscv/init.c
new file mode 100644
index 000000000000..a875a76aa44c
--- /dev/null
+++ b/drivers/acpi/riscv/init.c
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2023-2024, Ventana Micro Systems Inc
+ * Author: Sunil V L <sunilvl@ventanamicro.com>
+ */
+
+#include <linux/acpi.h>
+
+void __init acpi_riscv_init(void)
+{
+}
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 3fff86f95c2f..892025d873f0 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -1531,6 +1531,12 @@ void acpi_arm_init(void);
static inline void acpi_arm_init(void) { }
#endif
+#ifdef CONFIG_RISCV
+void acpi_riscv_init(void);
+#else
+static inline void acpi_riscv_init(void) { }
+#endif
+
#ifdef CONFIG_ACPI_PCC
void acpi_init_pcc(void);
#else
--
2.43.0
next prev parent reply other threads:[~2024-08-12 1:02 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-12 0:59 [PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-08-12 0:59 ` [PATCH v8 01/17] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2024-08-12 18:09 ` Bjorn Helgaas
2024-08-14 5:32 ` Sunil V L
2024-08-12 0:59 ` [PATCH v8 02/17] ACPI: scan: Add a weak arch_sort_irqchip_probe() to order the IRQCHIP probe Sunil V L
2024-08-12 0:59 ` Sunil V L [this message]
2024-08-12 0:59 ` [PATCH v8 04/17] ACPI: scan: Refactor dependency creation Sunil V L
2024-08-12 0:59 ` [PATCH v8 05/17] ACPI: scan: Add RISC-V interrupt controllers to honor list Sunil V L
2024-08-12 0:59 ` [PATCH v8 06/17] ACPI: scan: Define weak function to populate dependencies Sunil V L
2024-08-12 0:59 ` [PATCH v8 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2024-08-12 0:59 ` [PATCH v8 08/17] ACPI: pci_link: Clear the dependencies after probe Sunil V L
2024-08-22 21:44 ` Bjorn Helgaas
2024-08-23 6:33 ` Sunil V L
2024-08-23 17:45 ` Bjorn Helgaas
2024-08-12 0:59 ` [PATCH v8 09/17] ACPI: RISC-V: Implement PCI related functionality Sunil V L
2024-08-12 0:59 ` [PATCH v8 10/17] ACPI: RISC-V: Implement function to reorder irqchip probe entries Sunil V L
2024-08-12 0:59 ` [PATCH v8 11/17] ACPI: RISC-V: Initialize GSI mapping structures Sunil V L
2024-08-12 0:59 ` [PATCH v8 12/17] ACPI: RISC-V: Implement function to add implicit dependencies Sunil V L
2024-08-12 0:59 ` [PATCH v8 13/17] irqchip/riscv-intc: Add ACPI support for AIA Sunil V L
2024-08-12 0:59 ` [PATCH v8 14/17] irqchip/riscv-imsic-state: Create separate function for DT Sunil V L
2024-08-12 0:59 ` [PATCH v8 15/17] irqchip/riscv-imsic: Add ACPI support Sunil V L
2024-08-12 0:59 ` [PATCH v8 16/17] irqchip/riscv-aplic: " Sunil V L
2024-08-12 0:59 ` [PATCH v8 17/17] irqchip/sifive-plic: " Sunil V L
2024-08-12 1:07 ` [PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-08-26 15:25 ` Thomas Gleixner
2024-08-26 16:15 ` Rafael J. Wysocki
2024-08-26 17:13 ` Sunil V L
2024-08-26 17:27 ` Rafael J. Wysocki
2024-08-26 21:17 ` Thomas Gleixner
2024-08-27 16:20 ` Rafael J. Wysocki
2024-08-27 17:04 ` Sunil V L
2024-08-27 17:12 ` Rafael J. Wysocki
2024-08-27 17:31 ` Sunil V L
2024-08-27 17:56 ` Rafael J. Wysocki
2024-08-27 18:12 ` Sunil V L
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