From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D74E9C3DA7F for ; Mon, 12 Aug 2024 17:41:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Subject:Cc:To: From:Date:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=z+MeYbhRaU3uAfs4rIrpWBzVXB0CBvPu45IJw1HhjMI=; b=x0BPWq2qd26bnjgSfFqRJB6B4V PeIz0rIbrrJ06rCvKAqcaN0UnCGFdRRcXdReKWyFW1wHRRPx5VzX9s2IkJqtMfh7gGrzjm10mLUwk /LJ4ptrld7drxnfuFOQyP3WCmVusO/gq8smjfdIQztww70HndVmrx8yC1xhhgb0KQ45Tuo+hX0IIf G3Hvq7jaS/KsWpZTajGL3wiN2CRYQ7kWRagEgQbz42lJ2ISsbVJUJJjX0blRVtTEwSOArLmpMShvf LVa/+JNuwi840CYX0BJQCgMVg1LvQFlx7uv/dXOCrFZtGE0jYS/uqNsv6La/jgWt6VeBN5UQGfoR1 i0Jm9a6A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdZ2k-000000014EO-3FKA; Mon, 12 Aug 2024 17:41:18 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdYzH-000000013PU-3ote for linux-arm-kernel@lists.infradead.org; Mon, 12 Aug 2024 17:37:45 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 08333FEC; Mon, 12 Aug 2024 10:38:08 -0700 (PDT) Received: from donnerap.manchester.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2DDB03F40C; Mon, 12 Aug 2024 10:37:41 -0700 (PDT) Date: Mon, 12 Aug 2024 18:37:38 +0100 From: Andre Przywara To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, akos.denke@arm.com, luca.fancellu@arm.com, maz@kernel.org Subject: Re: [BOOT-WRAPPER v2 01/10] aarch64: Remove redundant EL1 entry logic Message-ID: <20240812183738.7e5d4c4b@donnerap.manchester.arm.com> In-Reply-To: <20240812101555.3558589-2-mark.rutland@arm.com> References: <20240812101555.3558589-1-mark.rutland@arm.com> <20240812101555.3558589-2-mark.rutland@arm.com> Organization: ARM X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240812_103744_027875_098738BF X-CRM114-Status: GOOD ( 19.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 12 Aug 2024 11:15:46 +0100 Mark Rutland wrote: Hi, > For historical reasons the boot-wrapper has code to handle being entered > at Non-secure EL1, but currently this is unsupported and cannot be used > to boot a kernel as jump_kernel() unconditionally writes to SCTLR_EL2, > which will UNDEF. > > Remove the logic for handling Non-secure EL1. Indeed it hangs late when entered in EL1 atm, so we are not losing any functionality. It would be nice to support this, but it seems this could be added much easier after this series, iff people really need that. Reviewed-by: Andre Przywara > Signed-off-by: Mark Rutland > Acked-by: Marc Zyngier > Cc: Akos Denke > Cc: Andre Przywara > Cc: Luca Fancellu > --- > arch/aarch64/boot.S | 17 +---------------- > 1 file changed, 1 insertion(+), 16 deletions(-) > > diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S > index da5fa65..73ddcd0 100644 > --- a/arch/aarch64/boot.S > +++ b/arch/aarch64/boot.S > @@ -31,10 +31,8 @@ ASM_FUNC(_start) > b.eq reset_at_el3 > cmp x0, #CURRENTEL_EL2 > b.eq reset_at_el2 > - cmp x0, #CURRENTEL_EL1 > - b.eq reset_at_el1 > > - /* Booting at EL0 is not supported */ > + /* Booting at EL1 or EL0 is not supported */ > b . > > /* > @@ -72,19 +70,6 @@ reset_at_el2: > msr sctlr_el2, x0 > isb > > - b reset_no_el3 > - > - /* > - * EL1 initialization > - */ > -reset_at_el1: > - mov_64 x0, SCTLR_EL1_RESET > - msr sctlr_el1, x0 > - isb > - > - b reset_no_el3 > - > -reset_no_el3: > cpuid x0, x1 > bl find_logical_id > cmp x0, #MPIDR_INVALID