From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10A80C52D7C for ; Tue, 13 Aug 2024 17:15:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Subject:Cc:To: From:Date:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bIvQueyUy/qZOYVN3UdiGSfvkYFerWbJAU5j9hwuXag=; b=tGNePC7T2bXoOZjdySSrcHiR2Q 0nhINiLIhbw1T5CaXiYNsZCZJ/Eunij3PBxl6tBuONrvbeBAYy2GhpQQ502nQ84EKHXWjC8kG0UMP A8Uxde2uL2q8topAWdkfZ8zijrLhho3hJwqrUFJbpMUp68sv6iAko/qZflTNXkvvec6P3dJ0kwaiA IXm/o6dlkvVtqvF4FATbMd89vaLICTRjCirmWPWt3dS0+VVvOHMnLHczeA7620xlOUUttm1Lkot7R fSJM7LlVgR0SWmy7zIkTtpr/nSDQWHwBcqT4N4iu8DBHBnkl/5xAIinGNOqE15TDvZclsZ/q8Ue1X AEmyRWfQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdv72-00000004U03-2RpV; Tue, 13 Aug 2024 17:15:12 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sdv64-00000004Tsl-2lQG for linux-arm-kernel@lists.infradead.org; Tue, 13 Aug 2024 17:14:14 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E3734FEC; Tue, 13 Aug 2024 10:14:37 -0700 (PDT) Received: from donnerap.manchester.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 304483F58B; Tue, 13 Aug 2024 10:14:11 -0700 (PDT) Date: Tue, 13 Aug 2024 18:14:08 +0100 From: Andre Przywara To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, akos.denke@arm.com, luca.fancellu@arm.com, maz@kernel.org Subject: Re: [BOOT-WRAPPER v2 03/10] aarch64: Always enter kernel via exception return Message-ID: <20240813181408.6722178c@donnerap.manchester.arm.com> In-Reply-To: <20240812101555.3558589-4-mark.rutland@arm.com> References: <20240812101555.3558589-1-mark.rutland@arm.com> <20240812101555.3558589-4-mark.rutland@arm.com> Organization: ARM X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240813_101412_998750_AF5E0F30 X-CRM114-Status: GOOD ( 19.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 12 Aug 2024 11:15:48 +0100 Mark Rutland wrote: > When the boot-wrapper is entered at EL3 it will enter the kernel via > ERET, and when entered at EL2 it will branch to the kernel directly. > This is an artifact of the way the boot-wrapper was originally written > in assembly, and it would be preferable to always enter the kernel via > ERET so that PSTATE is always initialized to a known-good value. > > Rework jump_kernel() to always enter the kernel via ERET. That looks fine and still boots when entered in EL2 or EL3. Just one nit below, with that: Reviewed-by: Andre Przywara > > Signed-off-by: Mark Rutland > Acked-by: Marc Zyngier > Cc: Akos Denke > Cc: Andre Przywara > Cc: Luca Fancellu > --- > arch/aarch64/boot.S | 30 +++++++++++++----------------- > 1 file changed, 13 insertions(+), 17 deletions(-) > > diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S > index 52c617d..0ac0c98 100644 > --- a/arch/aarch64/boot.S > +++ b/arch/aarch64/boot.S > @@ -76,10 +76,6 @@ reset_at_el2: > b.eq err_invalid_id > bl setup_stack > > - mov w0, #1 > - ldr x1, =flag_no_el3 > - str w0, [x1] > - > bl cpu_init_bootwrapper > > bl cpu_init_arch > @@ -111,18 +107,11 @@ ASM_FUNC(jump_kernel) > bl find_logical_id > bl setup_stack // Reset stack pointer > > - ldr w0, flag_no_el3 > - cmp w0, #0 // Prepare Z flag > - > mov x0, x20 > mov x1, x21 > mov x2, x22 > mov x3, x23 > - > - b.eq 1f > - br x19 // No EL3 > - > -1: mov x4, #SPSR_KERNEL > + mov x4, #SPSR_KERNEL > > /* > * If bit 0 of the kernel address is set, we're entering in AArch32 > @@ -130,13 +119,20 @@ ASM_FUNC(jump_kernel) > */ > bfi x4, x19, #5, #1 > > + mrs x5, CurrentEL > + cmp x5, #CURRENTEL_EL3 > + b.eq eret_at_el3 > + cmp x5, #CURRENTEL_EL2 > + b.eq eret_at_el2 > + b . // Not possible > + > +eret_at_el3: > msr elr_el3, x19 > msr spsr_el3, x4 > eret > +eret_at_el2: > + msr elr_el2, x19 > + msr spsr_el2, x4 > + eret > > .ltorg Looks like we don't need this directive anymore. Cheers, Andre > - > - .data > - .align 3 > -flag_no_el3: > - .long 0