From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7E43C3DA4A for ; Fri, 16 Aug 2024 22:40:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=lVMxCOUSMfZjtUyY91jpHLUHfWN/MtjA9LjCvC9mxt0=; b=BHA98i7SPzboJiICrCp6yvFJS6 /8d3j5g/5F9UIc7FeZroUuwkEHs0CDIOQWV/Mnhc1y/l8wVVGFZoTpw9I0z626ynOOVBzs0aj2WMD XD93GAIot6S8Cp+IjsPwv5mCarsEJILWAHf4SI1MHa/9pri5v4Pg4dRwKoPQ1f+OBtU7S1FJsVkfd /Rfl1Gaz4vm56jlEHKY2h5Htq4pBSeSILY3zb8RaxBIKhn1k9a568ezQdtR32eaBpvfA5qb5Ccx7V yJ5/ZctWIZq6FKp01pes3O1NgWfEgU87q4Dxp2hhlBAVRhsbxRkVC85aoPUwCwg3DpIu1trexa9gZ bV0R7Zbg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sf5ce-0000000EDnI-056t; Fri, 16 Aug 2024 22:40:40 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sf5bz-0000000EDgs-2UXW; Fri, 16 Aug 2024 22:40:00 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id CE418622FA; Fri, 16 Aug 2024 22:39:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5CAC1C32782; Fri, 16 Aug 2024 22:39:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723847998; bh=yLgBm9EHFdqhhjPZ0xAEPGSJiVwgSWNa0lcI/kftets=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=drt0e7SJlXPXlA5dgoJrHp/EE6nyWURgh3JHxpgb3xvT7uRmoe2zziG2njkn2Obcx P1jWxlq/Z/NbE8rNjwIzmworTxqMWk48ZFT2EZ9FF5vmAirX8Tg1MFUfV6e2FcFyHD FbIWKcl6cdSSz5kwxbrFjJadhLYGvZKCCU5bZ4faHRp02Tz9oFKNkzE/a9XQBC1NVo NqUNd6WOu4KaDu0bHzQU1/cha920gSrChM+k9GHvgP3DLqd8kWXFROosgadTWRLD+d oCRLWdN5t3dGxJprHRVdgtAY6DIOEIg4LLPE5FJLBKMqZNtZjLpyQZ5NCrkGgwFlJM Tz+YKhKeAsiHg== Date: Fri, 16 Aug 2024 16:39:57 -0600 From: Rob Herring To: Liu Ying Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, tglx@linutronix.de, vkoul@kernel.org, kishon@kernel.org, aisheng.dong@nxp.com, agx@sigxcpu.org, francesco@dolcini.it, frank.li@nxp.com Subject: Re: [PATCH v3 04/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller pixel engine Message-ID: <20240816223957.GC2394350-robh@kernel.org> References: <20240724092950.752536-1-victor.liu@nxp.com> <20240724092950.752536-5-victor.liu@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240724092950.752536-5-victor.liu@nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240816_153959_707009_97269757 X-CRM114-Status: GOOD ( 10.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jul 24, 2024 at 05:29:35PM +0800, Liu Ying wrote: > i.MX8qxp Display Controller pixel engine consists of all processing units > that operate in the AXI bus clock domain. Command sequencer and interrupt > controller of the Display Controller work with AXI bus clock, but they are > not in pixel engine. > > Signed-off-by: Liu Ying > --- > v3: > * No change. > > v2: > * Drop fsl,dc-*-id DT properties from example. (Krzysztof) > * Fix register range sizes in example. > > .../imx/fsl,imx8qxp-dc-pixel-engine.yaml | 250 ++++++++++++++++++ > 1 file changed, 250 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-pixel-engine.yaml Reviewed-by: Rob Herring (Arm)