From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Alexander Potapenko <glider@google.com>
Subject: [PATCH v2 06/11] KVM: arm64: Add ICH_HCR_EL2 to the vcpu state
Date: Tue, 27 Aug 2024 16:25:12 +0100 [thread overview]
Message-ID: <20240827152517.3909653-7-maz@kernel.org> (raw)
In-Reply-To: <20240827152517.3909653-1-maz@kernel.org>
As we are about to describe the trap routing for ICH_HCR_EL2, add
the register to the vcpu state in its VNCR form, as well as reset
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/kvm_host.h | 2 ++
arch/arm64/kvm/sys_regs.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index a33f5996ca9f..16cd59362b3d 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -530,6 +530,8 @@ enum vcpu_sysreg {
VNCR(CNTP_CVAL_EL0),
VNCR(CNTP_CTL_EL0),
+ VNCR(ICH_HCR_EL2),
+
NR_SYS_REGS /* Nothing after this line! */
};
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index e9d8e916e3af..a57374de6968 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2797,6 +2797,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
EL2_REG(RVBAR_EL2, access_rw, reset_val, 0),
{ SYS_DESC(SYS_RMR_EL2), trap_undef },
+ EL2_REG_VNCR(ICH_HCR_EL2, reset_val, 0),
+
EL2_REG(CONTEXTIDR_EL2, access_rw, reset_val, 0),
EL2_REG(TPIDR_EL2, access_rw, reset_val, 0),
--
2.39.2
next prev parent reply other threads:[~2024-08-27 15:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-27 15:25 [PATCH v2 00/11] KVM: arm64: Handle the lack of GICv3 exposed to a guest Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 01/11] KVM: arm64: Move GICv3 trap configuration to kvm_calculate_traps() Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 02/11] KVM: arm64: Force SRE traps when SRE access is not enabled Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 03/11] KVM: arm64: Force GICv3 trap activation when no irqchip is configured on VHE Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 04/11] KVM: arm64: Add helper for last ditch idreg adjustments Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 05/11] KVM: arm64: Zero ID_AA64PFR0_EL1.GIC when no GICv3 is presented to the guest Marc Zyngier
2024-08-28 23:22 ` Mark Brown
2024-08-29 0:48 ` Oliver Upton
2024-08-27 15:25 ` Marc Zyngier [this message]
2024-08-27 15:25 ` [PATCH v2 07/11] KVM: arm64: Add trap routing information for ICH_HCR_EL2 Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 08/11] KVM: arm64: Honor guest requested traps in GICv3 emulation Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 09/11] KVM: arm64: Make most GICv3 accesses UNDEF if they trap Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 10/11] KVM: arm64: Unify UNDEF injection helpers Marc Zyngier
2024-08-27 15:25 ` [PATCH v2 11/11] KVM: arm64: Add selftest checking how the absence of GICv3 is handled Marc Zyngier
2024-08-27 17:01 ` [PATCH v2 00/11] KVM: arm64: Handle the lack of GICv3 exposed to a guest Oliver Upton
2024-08-27 17:41 ` Marc Zyngier
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