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* [PATCH 0/3] Some updates for HiSilicon PCIe PMU
@ 2024-08-29  9:03 Yicong Yang
  2024-08-29  9:03 ` [PATCH 1/3] drivers/perf: hisi_pcie: Record hardware counts correctly Yicong Yang
                   ` (3 more replies)
  0 siblings, 4 replies; 8+ messages in thread
From: Yicong Yang @ 2024-08-29  9:03 UTC (permalink / raw)
  To: jonathan.cameron, will, mark.rutland, linux-arm-kernel
  Cc: yangyicong, hejunhao3, linuxarm, wangyushan12

From: Yicong Yang <yangyicong@hisilicon.com>

This series include several updates for the HiSilicon PCIe PMU:
- PATCH 1/3 fixes error counts if user specifies a unsupported events
- PATCH 2/3 fixes unsupport of TLP headers only bandwidth counting
- PATCH 3/3 further export the Root Ports BDF range supported by the PMU

Yicong Yang (3):
  drivers/perf: hisi_pcie: Record hardware counts correctly
  drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting
  drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min,
    bdf_max]

 .../admin-guide/perf/hisi-pcie-pmu.rst        |  4 ++-
 drivers/perf/hisilicon/hisi_pcie_pmu.c        | 34 ++++++++++++++++++-
 2 files changed, 36 insertions(+), 2 deletions(-)

-- 
2.24.0



^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 1/3] drivers/perf: hisi_pcie: Record hardware counts correctly
  2024-08-29  9:03 [PATCH 0/3] Some updates for HiSilicon PCIe PMU Yicong Yang
@ 2024-08-29  9:03 ` Yicong Yang
  2024-08-29 13:41   ` Jonathan Cameron
  2024-08-29  9:03 ` [PATCH 2/3] drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting Yicong Yang
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 8+ messages in thread
From: Yicong Yang @ 2024-08-29  9:03 UTC (permalink / raw)
  To: jonathan.cameron, will, mark.rutland, linux-arm-kernel
  Cc: yangyicong, hejunhao3, linuxarm, wangyushan12

From: Yicong Yang <yangyicong@hisilicon.com>

Currently we set the period and record it as the initial value of the
counter without checking it's set to the hardware successfully or not.
However the counter maybe unwritable if the target event is unsupported
by the device. In such case we will pass user a wrong count:

[start counts when setting the period]
hwc->prev_count = 0x8000000000000000
device.counter_value = 0 // the counter is not set as the period
[when user reads the counter]
event->count = device.counter_value - hwc->prev_count
             = 0x8000000000000000 // wrong. should be 0.

Fix this by record the hardware counter counts correctly when setting
the period.

Fixes: 8404b0fbc7fb ("drivers/perf: hisi: Add driver for HiSilicon PCIe PMU")
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
---
 drivers/perf/hisilicon/hisi_pcie_pmu.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c
index f06027574a24..fba569a8640c 100644
--- a/drivers/perf/hisilicon/hisi_pcie_pmu.c
+++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c
@@ -452,10 +452,24 @@ static void hisi_pcie_pmu_set_period(struct perf_event *event)
 	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(event->pmu);
 	struct hw_perf_event *hwc = &event->hw;
 	int idx = hwc->idx;
+	u64 orig_cnt, cnt;
+
+	orig_cnt = hisi_pcie_pmu_read_counter(event);
 
 	local64_set(&hwc->prev_count, HISI_PCIE_INIT_VAL);
 	hisi_pcie_pmu_writeq(pcie_pmu, HISI_PCIE_CNT, idx, HISI_PCIE_INIT_VAL);
 	hisi_pcie_pmu_writeq(pcie_pmu, HISI_PCIE_EXT_CNT, idx, HISI_PCIE_INIT_VAL);
+
+	/*
+	 * The counter maybe unwritable if the target event is unsupported.
+	 * Check this by comparing the counts after setting the period. If
+	 * the counts stay unchanged after setting the period then update
+	 * the hwc->prev_count correctly. Otherwise the final counts user
+	 * get maybe totally wrong.
+	 */
+	cnt = hisi_pcie_pmu_read_counter(event);
+	if (orig_cnt == cnt)
+		local64_set(&hwc->prev_count, cnt);
 }
 
 static void hisi_pcie_pmu_enable_counter(struct hisi_pcie_pmu *pcie_pmu, struct hw_perf_event *hwc)
-- 
2.24.0



^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH 2/3] drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting
  2024-08-29  9:03 [PATCH 0/3] Some updates for HiSilicon PCIe PMU Yicong Yang
  2024-08-29  9:03 ` [PATCH 1/3] drivers/perf: hisi_pcie: Record hardware counts correctly Yicong Yang
@ 2024-08-29  9:03 ` Yicong Yang
  2024-08-29 13:42   ` Jonathan Cameron
  2024-08-29  9:03 ` [PATCH 3/3] drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min, bdf_max] Yicong Yang
  2024-08-30 16:12 ` [PATCH 0/3] Some updates for HiSilicon PCIe PMU Will Deacon
  3 siblings, 1 reply; 8+ messages in thread
From: Yicong Yang @ 2024-08-29  9:03 UTC (permalink / raw)
  To: jonathan.cameron, will, mark.rutland, linux-arm-kernel
  Cc: yangyicong, hejunhao3, linuxarm, wangyushan12

From: Yicong Yang <yangyicong@hisilicon.com>

We make the initial value of event ctrl register as HISI_PCIE_INIT_SET
and modify according to the user options. This will make TLP headers
bandwidth only counting never take effect since HISI_PCIE_INIT_SET
configures to count the TLP payloads bandwidth. Fix this by making
the initial value of event ctrl register as 0.

Fixes: 17d573984d4d ("drivers/perf: hisi: Add TLP filter support")
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
---
 drivers/perf/hisilicon/hisi_pcie_pmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c
index fba569a8640c..f7d6c59d9930 100644
--- a/drivers/perf/hisilicon/hisi_pcie_pmu.c
+++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c
@@ -208,7 +208,7 @@ static void hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset,
 static u64 hisi_pcie_pmu_get_event_ctrl_val(struct perf_event *event)
 {
 	u64 port, trig_len, thr_len, len_mode;
-	u64 reg = HISI_PCIE_INIT_SET;
+	u64 reg = 0;
 
 	/* Config HISI_PCIE_EVENT_CTRL according to event. */
 	reg |= FIELD_PREP(HISI_PCIE_EVENT_M, hisi_pcie_get_real_event(event));
-- 
2.24.0



^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH 3/3] drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min, bdf_max]
  2024-08-29  9:03 [PATCH 0/3] Some updates for HiSilicon PCIe PMU Yicong Yang
  2024-08-29  9:03 ` [PATCH 1/3] drivers/perf: hisi_pcie: Record hardware counts correctly Yicong Yang
  2024-08-29  9:03 ` [PATCH 2/3] drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting Yicong Yang
@ 2024-08-29  9:03 ` Yicong Yang
  2024-08-29 13:43   ` Jonathan Cameron
  2024-08-30 16:12 ` [PATCH 0/3] Some updates for HiSilicon PCIe PMU Will Deacon
  3 siblings, 1 reply; 8+ messages in thread
From: Yicong Yang @ 2024-08-29  9:03 UTC (permalink / raw)
  To: jonathan.cameron, will, mark.rutland, linux-arm-kernel
  Cc: yangyicong, hejunhao3, linuxarm, wangyushan12

From: Yicong Yang <yangyicong@hisilicon.com>

Currently users can get the Root Ports supported by the PCIe PMU by
"bus" sysfs attributes which indicates the PCIe bus number where
Root Ports are located. This maybe insufficient since Root Ports
supported by different PCIe PMUs may be located on the same PCIe bus.
So export the BDF range the Root Ports additionally.

Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
---
 .../admin-guide/perf/hisi-pcie-pmu.rst         |  4 +++-
 drivers/perf/hisilicon/hisi_pcie_pmu.c         | 18 ++++++++++++++++++
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/Documentation/admin-guide/perf/hisi-pcie-pmu.rst b/Documentation/admin-guide/perf/hisi-pcie-pmu.rst
index 5541ff40e06a..083ca50de896 100644
--- a/Documentation/admin-guide/perf/hisi-pcie-pmu.rst
+++ b/Documentation/admin-guide/perf/hisi-pcie-pmu.rst
@@ -28,7 +28,9 @@ The "identifier" sysfs file allows users to identify the version of the
 PMU hardware device.
 
 The "bus" sysfs file allows users to get the bus number of Root Ports
-monitored by PMU.
+monitored by PMU. Furthermore users can get the Root Ports range in
+[bdf_min, bdf_max] from "bdf_min" and "bdf_max" sysfs attributes
+respectively.
 
 Example usage of perf::
 
diff --git a/drivers/perf/hisilicon/hisi_pcie_pmu.c b/drivers/perf/hisilicon/hisi_pcie_pmu.c
index f7d6c59d9930..c5394d007b61 100644
--- a/drivers/perf/hisilicon/hisi_pcie_pmu.c
+++ b/drivers/perf/hisilicon/hisi_pcie_pmu.c
@@ -141,6 +141,22 @@ static ssize_t bus_show(struct device *dev, struct device_attribute *attr, char
 }
 static DEVICE_ATTR_RO(bus);
 
+static ssize_t bdf_min_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(dev_get_drvdata(dev));
+
+	return sysfs_emit(buf, "%#04x\n", pcie_pmu->bdf_min);
+}
+static DEVICE_ATTR_RO(bdf_min);
+
+static ssize_t bdf_max_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct hisi_pcie_pmu *pcie_pmu = to_pcie_pmu(dev_get_drvdata(dev));
+
+	return sysfs_emit(buf, "%#04x\n", pcie_pmu->bdf_max);
+}
+static DEVICE_ATTR_RO(bdf_max);
+
 static struct hisi_pcie_reg_pair
 hisi_pcie_parse_reg_value(struct hisi_pcie_pmu *pcie_pmu, u32 reg_off)
 {
@@ -763,6 +779,8 @@ static const struct attribute_group hisi_pcie_pmu_format_group = {
 
 static struct attribute *hisi_pcie_pmu_bus_attrs[] = {
 	&dev_attr_bus.attr,
+	&dev_attr_bdf_max.attr,
+	&dev_attr_bdf_min.attr,
 	NULL
 };
 
-- 
2.24.0



^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/3] drivers/perf: hisi_pcie: Record hardware counts correctly
  2024-08-29  9:03 ` [PATCH 1/3] drivers/perf: hisi_pcie: Record hardware counts correctly Yicong Yang
@ 2024-08-29 13:41   ` Jonathan Cameron
  0 siblings, 0 replies; 8+ messages in thread
From: Jonathan Cameron @ 2024-08-29 13:41 UTC (permalink / raw)
  To: Yicong Yang
  Cc: will, mark.rutland, linux-arm-kernel, yangyicong, hejunhao3,
	linuxarm, wangyushan12

On Thu, 29 Aug 2024 17:03:30 +0800
Yicong Yang <yangyicong@huawei.com> wrote:

> From: Yicong Yang <yangyicong@hisilicon.com>
> 
> Currently we set the period and record it as the initial value of the
> counter without checking it's set to the hardware successfully or not.
> However the counter maybe unwritable if the target event is unsupported
> by the device. In such case we will pass user a wrong count:
> 
> [start counts when setting the period]
> hwc->prev_count = 0x8000000000000000
> device.counter_value = 0 // the counter is not set as the period
> [when user reads the counter]
> event->count = device.counter_value - hwc->prev_count
>              = 0x8000000000000000 // wrong. should be 0.
> 
> Fix this by record the hardware counter counts correctly when setting
> the period.
> 
> Fixes: 8404b0fbc7fb ("drivers/perf: hisi: Add driver for HiSilicon PCIe PMU")
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/3] drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting
  2024-08-29  9:03 ` [PATCH 2/3] drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting Yicong Yang
@ 2024-08-29 13:42   ` Jonathan Cameron
  0 siblings, 0 replies; 8+ messages in thread
From: Jonathan Cameron @ 2024-08-29 13:42 UTC (permalink / raw)
  To: Yicong Yang
  Cc: will, mark.rutland, linux-arm-kernel, yangyicong, hejunhao3,
	linuxarm, wangyushan12

On Thu, 29 Aug 2024 17:03:31 +0800
Yicong Yang <yangyicong@huawei.com> wrote:

> From: Yicong Yang <yangyicong@hisilicon.com>
> 
> We make the initial value of event ctrl register as HISI_PCIE_INIT_SET
> and modify according to the user options. This will make TLP headers
> bandwidth only counting never take effect since HISI_PCIE_INIT_SET
> configures to count the TLP payloads bandwidth. Fix this by making
> the initial value of event ctrl register as 0.
> 
> Fixes: 17d573984d4d ("drivers/perf: hisi: Add TLP filter support")
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 3/3] drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min, bdf_max]
  2024-08-29  9:03 ` [PATCH 3/3] drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min, bdf_max] Yicong Yang
@ 2024-08-29 13:43   ` Jonathan Cameron
  0 siblings, 0 replies; 8+ messages in thread
From: Jonathan Cameron @ 2024-08-29 13:43 UTC (permalink / raw)
  To: Yicong Yang
  Cc: will, mark.rutland, linux-arm-kernel, yangyicong, hejunhao3,
	linuxarm, wangyushan12

On Thu, 29 Aug 2024 17:03:32 +0800
Yicong Yang <yangyicong@huawei.com> wrote:

> From: Yicong Yang <yangyicong@hisilicon.com>
> 
> Currently users can get the Root Ports supported by the PCIe PMU by
> "bus" sysfs attributes which indicates the PCIe bus number where
> Root Ports are located. This maybe insufficient since Root Ports
> supported by different PCIe PMUs may be located on the same PCIe bus.
> So export the BDF range the Root Ports additionally.
> 
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 0/3] Some updates for HiSilicon PCIe PMU
  2024-08-29  9:03 [PATCH 0/3] Some updates for HiSilicon PCIe PMU Yicong Yang
                   ` (2 preceding siblings ...)
  2024-08-29  9:03 ` [PATCH 3/3] drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min, bdf_max] Yicong Yang
@ 2024-08-30 16:12 ` Will Deacon
  3 siblings, 0 replies; 8+ messages in thread
From: Will Deacon @ 2024-08-30 16:12 UTC (permalink / raw)
  To: jonathan.cameron, mark.rutland, linux-arm-kernel, Yicong Yang
  Cc: catalin.marinas, kernel-team, Will Deacon, yangyicong, hejunhao3,
	linuxarm, wangyushan12

On Thu, 29 Aug 2024 17:03:29 +0800, Yicong Yang wrote:
> This series include several updates for the HiSilicon PCIe PMU:
> - PATCH 1/3 fixes error counts if user specifies a unsupported events
> - PATCH 2/3 fixes unsupport of TLP headers only bandwidth counting
> - PATCH 3/3 further export the Root Ports BDF range supported by the PMU
> 
> Yicong Yang (3):
>   drivers/perf: hisi_pcie: Record hardware counts correctly
>   drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting
>   drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min,
>     bdf_max]
> 
> [...]

Applied to arm64 (for-next/perf), thanks!

[1/3] drivers/perf: hisi_pcie: Record hardware counts correctly
      https://git.kernel.org/arm64/c/daecd3373a16
[2/3] drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting
      https://git.kernel.org/arm64/c/17bf68aeb364
[3/3] drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min, bdf_max]
      https://git.kernel.org/arm64/c/d1c93d5c67eb

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev


^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2024-08-30 16:19 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-08-29  9:03 [PATCH 0/3] Some updates for HiSilicon PCIe PMU Yicong Yang
2024-08-29  9:03 ` [PATCH 1/3] drivers/perf: hisi_pcie: Record hardware counts correctly Yicong Yang
2024-08-29 13:41   ` Jonathan Cameron
2024-08-29  9:03 ` [PATCH 2/3] drivers/perf: hisi_pcie: Fix TLP headers bandwidth counting Yicong Yang
2024-08-29 13:42   ` Jonathan Cameron
2024-08-29  9:03 ` [PATCH 3/3] drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min, bdf_max] Yicong Yang
2024-08-29 13:43   ` Jonathan Cameron
2024-08-30 16:12 ` [PATCH 0/3] Some updates for HiSilicon PCIe PMU Will Deacon

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