From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 36739CA0FE0 for ; Fri, 30 Aug 2024 11:07:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:Cc:To:From:Subject:Message-ID:References:Mime-Version: In-Reply-To:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Ic37IELEQRRYuBS18VKDjuHeMlY5e56pj2JA+eqlY6M=; b=T95JWAwSfvj9wMADVUX9/l9yMT Ess5ofwY/VaaazyS168k6+EGX6AKnzJgkZQrSIvPSWXaFzo8MOAsfKPAEiiIP4m7O/YHkv4vblh8r eQqitizZH+ESC8QjdVSEnBO2tzMYmWZhO9VotU/BiD16T2IQ6xujMyjU22N4UguhVcGm+X7IhNzXI r3ZC1He14QxLUprbVu7cf3JZtPYY5ngSnqnbgMbZj15FUGkMBv4EUDX40UxG3XOehEdaDSd4wMZ/3 68tlxMKKd7oBMBxFeNl+sr1G8uSpmrDlPUA+RLPmh4meQQj3sE/ob976a1SALkOzoHz3su7KjcJoq G4oQsIQA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjzTc-00000005yGV-1Dcu; Fri, 30 Aug 2024 11:07:36 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjzQI-00000005x6z-46Sp for linux-arm-kernel@bombadil.infradead.org; Fri, 30 Aug 2024 11:04:11 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:Content-Type :Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date: Sender:Reply-To:Content-ID:Content-Description; bh=Ic37IELEQRRYuBS18VKDjuHeMlY5e56pj2JA+eqlY6M=; b=OFj4tUO9knD9Zlwc9/QXto/vto FWy36h1bnJdIyHFaiTuqEw6nZ7FKl6xHaf/61YePt6bgtCc8ANJ2GzhD8Ij5QFEJor5IlGqKldcgE RjuvBQpIbMCEb8W83B0450TGIxi6Hm4+qJqWjyG04FjqGORl0x7Xx2KDWzb6fcW1+7hf02s8ySQen llmzvhmkwUEJ+qEiIt7WhoSSoQUVUOW6Zust4C2LackHyth6yklSZ9F17SHfXHvfO+ZB4UopWpEdI TsEpc8B7Lm+Cnf59vwArII4XFratQOQRFiIvr2C9wQT1lBpiq2ZYWmP2OI5YS3SFFWM81US0icycf EKqSZxGw==; Received: from mail-yw1-x1149.google.com ([2607:f8b0:4864:20::1149]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjzQC-0000000Beww-2ndC for linux-arm-kernel@lists.infradead.org; Fri, 30 Aug 2024 11:04:09 +0000 Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-6b4270bdea3so38364557b3.3 for ; Fri, 30 Aug 2024 04:04:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1725015839; x=1725620639; darn=lists.infradead.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:from:to:cc:subject:date:message-id :reply-to; bh=Ic37IELEQRRYuBS18VKDjuHeMlY5e56pj2JA+eqlY6M=; b=fuqdjOxFGWg+cF4eArk6rM88WmbKFpZm1GhdFobtN1hbeLa8wWoDTtByJ3W4IZAA5Z 5kJB0rUePPMTmgImq0fDGw61nzqmLm1FdUqn3Df4cCFjWTgOITRt7TplwvMrWH4TbQcp 2KTEF+6tD5yEHORbawWjoCDUS3yf4r5JSuiSYhBw9Wa6vnJOWfddXSvLEfoGS0LqUL59 y87qz2MK33w29F99o2mXJDtcEshHXwIFP5wUSlUdjGJtrxXFJz5cFG8iDVlvH3V4rV3S 5jAuE/dgFd9cvntZzbSFbmPl3+IA8SKVMFUZ1jAjlj07QjUt5T7bDQTWyFLIUuex+EP7 zjEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725015839; x=1725620639; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=Ic37IELEQRRYuBS18VKDjuHeMlY5e56pj2JA+eqlY6M=; b=GRUFMPZUWqMZhotKoyCVLpsl9RQy4oCygfBUz+nu0h4ULOtt5YYEynNw2F3kuyjAo1 +tXQog6RgqTyuzkdqbTP31YHxfaz2Qck/w+ziii4V82mmBj2wrqDKPo2D2x1Mg2hafVu aawVHW/XOqzIzKeS/ZauMiRLARuTqwKRvKSyvttdrfAU52q1DVQuFo1yybnj8vZRQEYA p97nYJQilLRafw4PJTSA34rSHMx75sIXni6lRhbiowIMVXr4W1vKVD6kQgMA+2Rimlid aPvYOemPZ+fCp00xMo/iG8mBeDGsZ/xzdAkO9Ul51haTa2eUXVfHXUGqANRBVzbJy/UF b3Hw== X-Forwarded-Encrypted: i=1; AJvYcCUDTuJfCr19xA7F/rC97KRKL1nY6D5dU+zCuDLnbjMYvACWO9hip0fXCd/IJZNoZb6hWfs1OPWZCYU49/7uLjYi@lists.infradead.org X-Gm-Message-State: AOJu0YyYoL35ogUZ/0HQ1PYdMM427B4jSeLopNo0/CToLvStiI/CTm4j Ad34CP+LRNIHBq96bKRghADWkLG30vMStlEOIPAgnRvd3sVUyGElepzfN1+tfM7arLkKs9xivIK i0sdIKZkZ0w== X-Google-Smtp-Source: AGHT+IEhIgqCCVpoJF04izZWNpGhj9w4DRkBO4N4vRbTNO83ovpMlTZbUepHXnCpHONa5Hk4mWllX9/lH0OXjQ== X-Received: from mostafa.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:333c]) (user=smostafa job=sendgmr) by 2002:a05:690c:3744:b0:64b:5cc7:bcb7 with SMTP id 00721157ae682-6d40d890122mr37757b3.1.1725015839642; Fri, 30 Aug 2024 04:03:59 -0700 (PDT) Date: Fri, 30 Aug 2024 11:03:47 +0000 In-Reply-To: <20240830110349.797399-1-smostafa@google.com> Mime-Version: 1.0 References: <20240830110349.797399-1-smostafa@google.com> X-Mailer: git-send-email 2.46.0.469.g59c65b2a67-goog Message-ID: <20240830110349.797399-2-smostafa@google.com> Subject: [PATCH v4 1/2] iommu/arm-smmu-v3: Match Stall behaviour for S2 From: Mostafa Saleh To: linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, will@kernel.org, robin.murphy@arm.com, joro@8bytes.org Cc: jean-philippe@linaro.org, jgg@ziepe.ca, nicolinc@nvidia.com, mshavit@google.com, Mostafa Saleh Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240830_120407_216794_5D3ACC36 X-CRM114-Status: GOOD ( 15.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org According to the spec (ARM IHI 0070 F.b), in "5.5 Fault configuration (A, R, S bits)": A STE with stage 2 translation enabled and STE.S2S =3D=3D 0 is considered ILLEGAL if SMMU_IDR0.STALL_MODEL =3D=3D 0b10. Also described in the pseudocode =E2=80=9CSteIllegal()=E2=80=9D if STE.Config =3D=3D '11x' then [..] if eff_idr0_stall_model =3D=3D '10' && STE.S2S =3D=3D '0' then // stall_model forcing stall, but S2S =3D=3D 0 return TRUE; Which means, S2S must be set when stall model is "ARM_SMMU_FEAT_STALL_FORCE", but currently the driver ignores that. Although, the driver can do the minimum and only set S2S for =E2=80=9CARM_SMMU_FEAT_STALL_FORCE=E2=80=9D, it is more consistent to match= S1 behaviour, which also sets it for =E2=80=9CARM_SMMU_FEAT_STALL=E2=80=9D if = the master has requested stalls. Also, since S2 stalls are enabled now, report them to the IOMMU layer and for VFIO devices it will fail anyway as VFIO doesn=E2=80=99t register a= n iopf handler. Signed-off-by: Mostafa Saleh --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 +++----- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index a31460f9f3d4..a0044ff2facf 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1012,7 +1012,8 @@ void arm_smmu_get_ste_used(const __le64 *ent, __le64 = *used_bits) used_bits[2] |=3D cpu_to_le64(STRTAB_STE_2_S2VMID | STRTAB_STE_2_VTCR | STRTAB_STE_2_S2AA64 | STRTAB_STE_2_S2ENDI | - STRTAB_STE_2_S2PTW | STRTAB_STE_2_S2R); + STRTAB_STE_2_S2PTW | STRTAB_STE_2_S2S | + STRTAB_STE_2_S2R); used_bits[3] |=3D cpu_to_le64(STRTAB_STE_3_S2TTB_MASK); } =20 @@ -1646,6 +1647,7 @@ void arm_smmu_make_s2_domain_ste(struct arm_smmu_ste = *target, STRTAB_STE_2_S2ENDI | #endif STRTAB_STE_2_S2PTW | + (master->stall_enabled ? STRTAB_STE_2_S2S : 0) | STRTAB_STE_2_S2R); =20 target->data[3] =3D cpu_to_le64(pgtbl_cfg->arm_lpae_s2_cfg.vttbr & @@ -1739,10 +1741,6 @@ static int arm_smmu_handle_evt(struct arm_smmu_devic= e *smmu, u64 *evt) return -EOPNOTSUPP; } =20 - /* Stage-2 is always pinned at the moment */ - if (evt[1] & EVTQ_1_S2) - return -EFAULT; - if (!(evt[1] & EVTQ_1_STALL)) return -EOPNOTSUPP; =20 diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index 14bca41a981b..0dc7ad43c64c 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -267,6 +267,7 @@ struct arm_smmu_ste { #define STRTAB_STE_2_S2AA64 (1UL << 51) #define STRTAB_STE_2_S2ENDI (1UL << 52) #define STRTAB_STE_2_S2PTW (1UL << 54) +#define STRTAB_STE_2_S2S (1UL << 57) #define STRTAB_STE_2_S2R (1UL << 58) =20 #define STRTAB_STE_3_S2TTB_MASK GENMASK_ULL(51, 4) --=20 2.46.0.469.g59c65b2a67-goog