Re: [PATCH v4 0/7] PCI: xilinx-nwl: Add phy support

[Bjorn Helgaas <helgaas@kernel.org>]

On Fri, Aug 30, 2024 at 04:08:08PM +0200, Michal Simek wrote:
> Hi Bjorn,
> 
> On 8/9/24 21:54, Bjorn Helgaas wrote:
> > On Fri, May 31, 2024 at 12:13:30PM -0400, Sean Anderson wrote:
> > > Add phy subsystem support for the xilinx-nwl PCIe controller. This
> > > series also includes several small fixes and improvements.
> > > 
> > > Changes in v4:
> > > - Clarify dt-bindings commit subject/message
> > > - Explain likely effects of the off-by-one error
> > > - Trim down UBSAN backtrace
> > > - Move if to after pci_host_probe
> > > - Remove if in err_phy
> > > - Fix error path in phy_enable skipping the first phy
> > > - Disable phys in reverse order
> > > - Use dev_err instead of WARN for errors
> > > 
> > > Changes in v3:
> > > - Document phys property
> > > - Expand off-by-one commit message
> > > 
> > > Changes in v2:
> > > - Remove phy-names
> > > - Add an example
> > > - Get phys by index and not by name
> > > 
> > > Sean Anderson (7):
> > >    dt-bindings: pci: xilinx-nwl: Add phys property
> > >    PCI: xilinx-nwl: Fix off-by-one in IRQ handler
> > >    PCI: xilinx-nwl: Fix register misspelling
> > >    PCI: xilinx-nwl: Rate-limit misc interrupt messages
> > >    PCI: xilinx-nwl: Clean up clock on probe failure/removal
> > >    PCI: xilinx-nwl: Add phy support
> > 
> > Applied the above to pci/controller/xilinx for v6.12, thanks!
> > 
> > I assume the DTS update below should go via some other tree, but let
> > me know if I should pick it up.
> 
> Would be good if you can pick it up with the series together.
> I have already acked that patch before.

Thanks, I picked up patch 7/7 "arm64: zynqmp: Add PCIe phys" as well!

Bjorn