From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25CBACA1007 for ; Fri, 30 Aug 2024 15:54:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=3F1Ewxbu4ALCdsXkSIhJn+RNK+b+3IVw0Ua1x9/uCTY=; b=prbXtZDjs8rmJ9 P8tmX8t9eoks0icZcmF8Djf14dfYa/6CNsGWZY5MC532HtXMapRf/r2g+YrAJALhV9eGCoaWFuvC6 Nm3FLHrQ7d9nIPIWQ4F2PjpVbqUhfRo/5PVTBcvJBdC2oskJtiOO/fL4YeV7YP3d1LNoN60jsgNLt WI7caEXqcIBnFZJQDI/oeXW0FutuFsgXefnMpe+lRIV8QLN9J1dB2HXt1R1OVbsyUttliSTgewFlq HfsMzBnUvK/EfIuT+B+VY29blk7YjZ5tL1gvBN9FW3iH+jZ2HY32uQB5NiyZWVUkQbT0YR0OlPhkE orTpMqxFxqH4gTs2iE/w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sk3xN-00000006tl7-2AsC; Fri, 30 Aug 2024 15:54:37 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sk3wT-00000006tUk-3VLc for linux-arm-kernel@lists.infradead.org; Fri, 30 Aug 2024 15:53:43 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 70FCECE1E6E; Fri, 30 Aug 2024 15:53:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 50F57C4CEC2; Fri, 30 Aug 2024 15:53:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1725033216; bh=KAS1HKScQz/1K1cMzMLfhKEY+ldYMSUTNl3Vz1DJ+M4=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=Lmr2dc00ZmFRCVzd3vvCJr7LiOnH42EfDnhudpuGJrzQJ7icx7oHsCr6ukpKdAWAW mHk+x0HFijY9yYSd5k9q+ut9GHbyknyfaPkSm5WV07ZdN/IBAJYR41Y93+tPzlau2q A0abwh8Q5drgfm2m8ZccJsplgYmP8NzQAB/TwQzrrWVNwgmytW/iYtA1oJgie8Ah1v pU3kOiZ8xX7eux99KllIIBrdpFY8FOS7bb8RvXV9oaqI+fA+Wm+8XPYq8xny9Nxjrt o7Q5ebCJ3fr9ean4YTFUOpnuXU9jE/g9tuOvFufcWH35qhagP2aAGvyFhtavNf4NfB jAJbCG96wkT9g== Date: Fri, 30 Aug 2024 10:53:33 -0500 From: Bjorn Helgaas To: Michal Simek Cc: Sean Anderson , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org, Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, Markus Elfring , Dan Carpenter , linux-kernel@vger.kernel.org, Bjorn Helgaas , Bharat Kumar Gogada , Bharat Kumar Gogada , Conor Dooley , Krzysztof Kozlowski , Lorenzo Pieralisi , Michal Simek , devicetree@vger.kernel.org Subject: Re: [PATCH v4 0/7] PCI: xilinx-nwl: Add phy support Message-ID: <20240830155333.GA104046@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <150898c0-c3b6-41d2-9ce1-dda6607c1648@amd.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240830_085342_071132_7B416AAC X-CRM114-Status: GOOD ( 20.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Aug 30, 2024 at 04:08:08PM +0200, Michal Simek wrote: > Hi Bjorn, > > On 8/9/24 21:54, Bjorn Helgaas wrote: > > On Fri, May 31, 2024 at 12:13:30PM -0400, Sean Anderson wrote: > > > Add phy subsystem support for the xilinx-nwl PCIe controller. This > > > series also includes several small fixes and improvements. > > > > > > Changes in v4: > > > - Clarify dt-bindings commit subject/message > > > - Explain likely effects of the off-by-one error > > > - Trim down UBSAN backtrace > > > - Move if to after pci_host_probe > > > - Remove if in err_phy > > > - Fix error path in phy_enable skipping the first phy > > > - Disable phys in reverse order > > > - Use dev_err instead of WARN for errors > > > > > > Changes in v3: > > > - Document phys property > > > - Expand off-by-one commit message > > > > > > Changes in v2: > > > - Remove phy-names > > > - Add an example > > > - Get phys by index and not by name > > > > > > Sean Anderson (7): > > > dt-bindings: pci: xilinx-nwl: Add phys property > > > PCI: xilinx-nwl: Fix off-by-one in IRQ handler > > > PCI: xilinx-nwl: Fix register misspelling > > > PCI: xilinx-nwl: Rate-limit misc interrupt messages > > > PCI: xilinx-nwl: Clean up clock on probe failure/removal > > > PCI: xilinx-nwl: Add phy support > > > > Applied the above to pci/controller/xilinx for v6.12, thanks! > > > > I assume the DTS update below should go via some other tree, but let > > me know if I should pick it up. > > Would be good if you can pick it up with the series together. > I have already acked that patch before. Thanks, I picked up patch 7/7 "arm64: zynqmp: Add PCIe phys" as well! Bjorn