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charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.2.12 (2023-09-09) X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240902_010906_426851_5B88E28E X-CRM114-Status: GOOD ( 18.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Melki , Srinivas Kandagatla , open list , "moderated list:MICROCHIP OTPC DRIVER" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello Claudiu, Am Sat, Aug 31, 2024 at 06:33:50PM +0300 schrieb claudiu beznea: > > > On 28.08.2024 11:14, Alexander Dahl wrote: > > Hello Claudiu, > > > > Am Sat, Aug 24, 2024 at 06:54:02PM +0300 schrieb claudiu beznea: > >> > >> > >> On 21.08.2024 13:59, Alexander Dahl wrote: > >>> According to datasheets DS60001765B for SAMA7G5 and DS60001579G for > >>> SAM9X60. > >>> > >>> Signed-off-by: Alexander Dahl > >>> --- > >>> drivers/nvmem/microchip-otpc.c | 15 +++++++++++++++ > >>> 1 file changed, 15 insertions(+) > >>> > >>> diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c > >>> index b8ed7412dbca..4630e96243ac 100644 > >>> --- a/drivers/nvmem/microchip-otpc.c > >>> +++ b/drivers/nvmem/microchip-otpc.c > >>> @@ -21,9 +21,24 @@ > >>> #define MCHP_OTPC_AR (0x8) > >>> #define MCHP_OTPC_SR (0xc) > >>> #define MCHP_OTPC_SR_READ BIT(6) > >>> +#define MCHP_OTPC_IER (0x10) > >>> +#define MCHP_OTPC_IDR (0x14) > >>> +#define MCHP_OTPC_IMR (0x18) > >>> +#define MCHP_OTPC_ISR (0x1C) > >>> +#define MCHP_OTPC_ISR_COERR BIT(13) > >>> #define MCHP_OTPC_HR (0x20) > >>> #define MCHP_OTPC_HR_SIZE GENMASK(15, 8) > >>> #define MCHP_OTPC_DR (0x24) > >>> +#define MCHP_OTPC_BAR (0x30) > >>> +#define MCHP_OTPC_CAR (0x34) > >>> +#define MCHP_OTPC_UHC0R (0x50) > >>> +#define MCHP_OTPC_UHC1R (0x54) > >>> +#define MCHP_OTPC_UID0R (0x60) > >>> +#define MCHP_OTPC_UID1R (0x64) > >>> +#define MCHP_OTPC_UID2R (0x68) > >>> +#define MCHP_OTPC_UID3R (0x6C) > >>> +#define MCHP_OTPC_WPMR (0xE4) > >>> +#define MCHP_OTPC_WPSR (0xE8) > >> > >> Are all these used in driver? > > > > Not all, but some. What are you implying? Only add register > > definitions actually used in the driver? > > Yes! Okay. So if I drop the patch with the warnings on driver probe you did not like (checking for pre probe error conditions in interrupt register for example), then it is just the MCHP_OTPC_UID0R and I would squash that one definition in the last patch adding the nvmem for the UID then, okay? Greets Alex > > > Why? > > Less code to maintain. If it's not used there is no meaning to have it. > > > > > > Those register offsets won't change, but helped us when debugging. > > Debug code (e.g. register dump) is not part of the patch series. > > > > Greets > > Alex > > > >> > >>> > >>> #define MCHP_OTPC_NAME "mchp-otpc" > >>> #define MCHP_OTPC_SIZE (11 * 1024) >