From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1EFEBCA0ED3 for ; Mon, 2 Sep 2024 19:48:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=7fg8xJvAeaVO5OMingIAlfGP9RXXQ57iDeb3R28L5JE=; b=HPf9CQc2R1UIZ3 5myA5fp/pgM7DXbeObmcTqSNFar6b9j4TwdAajZg/yRaVf+DCUglcsGi2AVI2+ZC1Jvg8iUwyrbNw bfFYOO7S6OssXog5zuNUBDfw9tLdLj46qACt4y/d7OO6d7bpb4kimx0TXl4k5/6vc6CVMAG6E9GM9 zvMWV2XHvkpwoI8aL3d4IZsZZsUL8CP3Neo7Xj1ABh9hJI2uToGTn5PXNHQ+XEV8IpGr+bKQy1m+J 1MwwojtUz+Y4FQmMcrrCioeHETkY3Yfs2ejTvXZZfXWp6G6v4vo1hdkzsRnWrxtSc60+ZJpSoodEi oGtLqujXzCii0FVNJAGA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1slD1i-0000000FR1d-0q8S; Mon, 02 Sep 2024 19:47:50 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1slD0n-0000000FQwa-2vdi; Mon, 02 Sep 2024 19:46:55 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id BD9F45C57D3; Mon, 2 Sep 2024 19:46:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8D7D8C4CEC2; Mon, 2 Sep 2024 19:46:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1725306411; bh=vdkiPzrYmE5RUCC9GcrISY44Jm6tRQ85m3k0DgjEVqM=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=PBAP/dxI/1mlNP11Qd9ptptG7K6TLp+p6QjLpf8Z0EbHWeJGspD1/hFfyy1tE696C NnSgSqLwJhfRkPkSdfh5vur6cxH3M/j5y6dSSMRQGfTz1c9NaZM7m+UxXF3H9p/HAz ifDBg++zhUJVBCHJynZUt0wYMkOeUSn0pdMz8OoULBFZPoyl2ye7erNOBR4bVy4yLJ hWMaW6tCjkdMPgWdJz7K/2Aa8BUaT/pEzwqXyNsa60+2U54BpGio4j8WdDTT9EjfvI N1myy2FSDRlhLro3IMYXCiJrsbCaei9DbyFY8heZFbdKeUYQNuocdejpGJwWDo3Irf IskSg0j3RnoKA== Date: Mon, 2 Sep 2024 14:46:49 -0500 From: Bjorn Helgaas To: Jim Quinlan Cc: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Stanimir Varbanov , Manivannan Sadhasivam , Krzysztof Kozlowski , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, Florian Fainelli , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , open list Subject: Re: [PATCH v6 07/13] PCI: brcmstb: PCI: brcmstb: Make HARD_DEBUG, INTR2_CPU_BASE offsets SoC-specific Message-ID: <20240902194649.GA224705@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240815225731.40276-8-james.quinlan@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240902_124654_002470_A4E17E77 X-CRM114-Status: GOOD ( 15.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 15, 2024 at 06:57:20PM -0400, Jim Quinlan wrote: > Do prepatory work for the 7712 SoC, which is introduced in a future commit. > Our HW design has changed two register offsets for the 7712, where > previously it was a common value for all Broadcom SOCs with PCIe cores. > Specifically, the two offsets are to the registers HARD_DEBUG and > INTR2_CPU_BASE. > @@ -1499,12 +1502,16 @@ static const int pcie_offsets[] = { > [RGR1_SW_INIT_1] = 0x9210, > [EXT_CFG_INDEX] = 0x9000, > [EXT_CFG_DATA] = 0x9004, > + [PCIE_HARD_DEBUG] = 0x4204, > + [PCIE_INTR2_CPU_BASE] = 0x4300, > }; > > static const int pcie_offsets_bmips_7425[] = { > [RGR1_SW_INIT_1] = 0x8010, > [EXT_CFG_INDEX] = 0x8300, > [EXT_CFG_DATA] = 0x8304, > + [PCIE_HARD_DEBUG] = 0x4204, > + [PCIE_INTR2_CPU_BASE] = 0x4300, > }; > > static const struct pcie_cfg_data generic_cfg = { > @@ -1539,6 +1546,8 @@ static const int pcie_offset_bcm7278[] = { > [RGR1_SW_INIT_1] = 0xc010, > [EXT_CFG_INDEX] = 0x9000, > [EXT_CFG_DATA] = 0x9004, > + [PCIE_HARD_DEBUG] = 0x4204, > + [PCIE_INTR2_CPU_BASE] = 0x4300, > }; What's the organization scheme here? We now have: static const int pcie_offsets[] = { ... }; static const int pcie_offsets_bmips_7425[] = { ... }; static const int pcie_offset_bcm7712[] = { ... }; static const struct pcie_cfg_data generic_cfg = { ... }; static const struct pcie_cfg_data bcm7425_cfg = { ... }; static const struct pcie_cfg_data bcm7435_cfg = { ... }; static const struct pcie_cfg_data bcm4908_cfg = { ... }; static const int pcie_offset_bcm7278[] = { ... }; static const struct pcie_cfg_data bcm7278_cfg = { ... }; static const struct pcie_cfg_data bcm2711_cfg = { ... }; static const struct pcie_cfg_data bcm7216_cfg = { ... }; static const struct pcie_cfg_data bcm7712_cfg = { ... }; So we have pcie_offsets_bmips_7425[] and pcie_offset_bcm7712[] (with gratuituously different "offset" vs "offsets") which are all together before the pcie_cfg_data. Then we have pcie_offset_bcm7278[] (again gratuitously different "offset") separately, next to bcm7278_cfg. It would be nice to pick one scheme and stick to it. Also a seemingly random order of the pcie_cfg_data structs and .compatible strings. Also a little confusing to have "bmips_7425" and "bcm7425" associated with the same chip. I suppose there's historical reason for it, but I don't think it's helpful in this usage. > static const struct pcie_cfg_data bcm7278_cfg = { > -- > 2.17.1 >