From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93883CD13CF for ; Tue, 3 Sep 2024 12:45:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:CC:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=kxd09p87eyIpKEs742hX/lKSrt7kw7ToaYqhb3glXVw=; b=jfqsW3WSYKqbsH/aa5/FeBCKGl h9gtZvfrTzDlnJ6zShS09vQQg8fkLKLxRNcvrEzVUZXPnOa6T/ATGIRHWZhCzk7AxTBKRW3c/zvo0 Mv79hf5XAj4lbljC1PXEL6tFkHNiKHsLPsXKW3K8eq9x6nEK9CVC3hp/z31l9u/SaJLsQwjV6iAlO xDt6/EmEyC6X29KQbhfTkB0WQYlmqjLyl/LmOxwOUT1beqp2EV8gSp4QmzEMO1xAwsQx9nm8pbrwr O1+jlho3kPB0CDJ3NIjHQzxAEQSRW/jcl7DVw7wxqvmqfGnY8hFmaab7+errkWdhIAbs6S01TaXRQ dFRuFAVw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1slSu6-00000000DnW-05Ny; Tue, 03 Sep 2024 12:45:02 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1slSsK-00000000D00-1xnK for linux-arm-kernel@lists.infradead.org; Tue, 03 Sep 2024 12:43:14 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 483Cgufj049953; Tue, 3 Sep 2024 07:42:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1725367376; bh=kxd09p87eyIpKEs742hX/lKSrt7kw7ToaYqhb3glXVw=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=FRBkIOhD6e2QzcAQrI9xnzPedjQmZgKaBx+Y+YYCvvTPeOlENOiFOiYkMEPSLQR25 c386Kvvd1dzT059YU0ZBI4OHZ1dqqwfd6SL+KHaGom6tLT9p24rymuukkHbiq53S4V 7WMQ+3/V55UqyvD9cCgWayVexND8omaAcS7D9Rhw= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 483CguFU084459 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 3 Sep 2024 07:42:56 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 3 Sep 2024 07:42:56 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 3 Sep 2024 07:42:56 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 483Cgu0k010869; Tue, 3 Sep 2024 07:42:56 -0500 Date: Tue, 3 Sep 2024 07:42:56 -0500 From: Nishanth Menon To: Josua Mayer CC: Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , Subject: Re: [PATCH v2] arm64: dts: ti: k3-am642-sr-som: mux ethernet phy reset signals input Message-ID: <20240903124256.kmlkjcihl6zyzgiu@commuting> References: <20240903-am64-phy-lockup-v2-1-8cf6bd138ebd@solid-run.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240903-am64-phy-lockup-v2-1-8cf6bd138ebd@solid-run.com> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240903_054312_692742_AA749726 X-CRM114-Status: GOOD ( 19.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 11:52-20240903, Josua Mayer wrote: > Specifically on AM64 SoM design, the DP83869 phys have a chance to lock > up if reset gpio changes state. Update the pinmux to input-only, > strongly enforcing that these signals are left floating at all times. > > This avoids sporadic phy initialisation errors mostly encountered during > power-on and reset. In this state the phys respond to all mdio messages > with a constant response, recovering only after power-cycle. > > Signed-off-by: Josua Mayer > --- > Changes in v2: > - update commit message with additional details > - rebased on v6.11-rc1 > - Link to v1: https://lore.kernel.org/r/20240704-am64-phy-lockup-v1-1-4a38ded44f9d@solid-run.com > --- > arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi > index c19d0b8bbf0f..b1f06071df4c 100644 > --- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi > @@ -320,7 +320,7 @@ AM64X_IOPAD(0x0278, PIN_INPUT, 7) /* EXTINTn.GPIO1_70 */ > ethernet_phy0_default_pins: ethernet-phy0-default-pins { > pinctrl-single,pins = < > /* reset */ > - AM64X_IOPAD(0x0154, PIN_OUTPUT, 7) /* PRG1_PRU1_GPO19.GPIO0_84 */ > + AM64X_IOPAD(0x0154, PIN_INPUT, 7) /* PRG1_PRU1_GPO19.GPIO0_84 */ > /* reference clock */ > AM64X_IOPAD(0x0274, PIN_OUTPUT, 5) /* EXT_REFCLK1.CLKOUT0 */ > >; > @@ -329,7 +329,7 @@ AM64X_IOPAD(0x0274, PIN_OUTPUT, 5) /* EXT_REFCLK1.CLKOUT0 */ > ethernet_phy1_default_pins: ethernet-phy1-default-pins { > pinctrl-single,pins = < > /* reset */ > - AM64X_IOPAD(0x0150, PIN_OUTPUT, 7) /* PRG1_PRU1_GPO18.GPIO0_20 */ > + AM64X_IOPAD(0x0150, PIN_INPUT, 7) /* PRG1_PRU1_GPO18.GPIO0_20 */ > /* led0, external pull-down on SoM */ > AM64X_IOPAD(0x0128, PIN_INPUT, 7) /* PRG1_PRU1_GPO8.GPIO0_73 */ > /* led1/rxer */ > @@ -340,7 +340,7 @@ AM64X_IOPAD(0x011c, PIN_INPUT, 7) /* PRG1_PRU1_GPO5.GPIO0_70 */ > ethernet_phy2_default_pins: ethernet-phy2-default-pins { > pinctrl-single,pins = < > /* reset */ > - AM64X_IOPAD(0x00d4, PIN_OUTPUT, 7) /* PRG1_PRU0_GPO7.GPIO0_52 */ > + AM64X_IOPAD(0x00d4, PIN_INPUT, 7) /* PRG1_PRU0_GPO7.GPIO0_52 */ PIN_INPUT is bi-directional despite what the name states. Either way, it is a bit late for me to pick things up. > /* led0, external pull-down on SoM */ > AM64X_IOPAD(0x00d8, PIN_INPUT, 7) /* PRG1_PRU0_GPO8.GPIO0_53 */ > /* led1/rxer */ > > --- > base-commit: 8400291e289ee6b2bf9779ff1c83a291501f017b > change-id: 20240704-am64-phy-lockup-107ea5ffa228 > > Best regards, > -- > Josua Mayer > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D