linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	kvm@vger.kernel.org
Cc: James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Joey Gouly <joey.gouly@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v2 03/16] KVM: arm64: Add TCR2_EL2 to the sysreg arrays
Date: Tue,  3 Sep 2024 16:38:21 +0100	[thread overview]
Message-ID: <20240903153834.1909472-4-maz@kernel.org> (raw)
In-Reply-To: <20240903153834.1909472-1-maz@kernel.org>

Add the TCR2_EL2 register to the per-vcpu sysreg register
array, as well as the sysreg descriptor array.

Access to this register is conditional based on ID_AA64MMFR3_EL1.TCRX
being advertised.

Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/include/asm/kvm_host.h |  1 +
 arch/arm64/kvm/sys_regs.c         | 13 +++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index a33f5996ca9f..5a9e0ad35580 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -462,6 +462,7 @@ enum vcpu_sysreg {
 	TTBR0_EL2,	/* Translation Table Base Register 0 (EL2) */
 	TTBR1_EL2,	/* Translation Table Base Register 1 (EL2) */
 	TCR_EL2,	/* Translation Control Register (EL2) */
+	TCR2_EL2,	/* Extended Translation Control Register (EL2) */
 	SPSR_EL2,	/* EL2 saved program status register */
 	ELR_EL2,	/* EL2 exception link register */
 	AFSR0_EL2,	/* Auxiliary Fault Status Register 0 (EL2) */
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 7563826f286a..0510e96f732a 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -436,6 +436,18 @@ static bool access_vm_reg(struct kvm_vcpu *vcpu,
 	return true;
 }
 
+static bool access_tcr2_el2(struct kvm_vcpu *vcpu,
+			    struct sys_reg_params *p,
+			    const struct sys_reg_desc *r)
+{
+	if (!kvm_has_feat(vcpu->kvm, ID_AA64MMFR3_EL1, TCRX, IMP)) {
+		kvm_inject_undefined(vcpu);
+		return false;
+	}
+
+	return access_rw(vcpu, p, r);
+}
+
 static bool access_actlr(struct kvm_vcpu *vcpu,
 			 struct sys_reg_params *p,
 			 const struct sys_reg_desc *r)
@@ -2783,6 +2795,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 	EL2_REG(TTBR0_EL2, access_rw, reset_val, 0),
 	EL2_REG(TTBR1_EL2, access_rw, reset_val, 0),
 	EL2_REG(TCR_EL2, access_rw, reset_val, TCR_EL2_RES1),
+	EL2_REG(TCR2_EL2, access_tcr2_el2, reset_val, TCR2_EL2_RES1),
 	EL2_REG_VNCR(VTTBR_EL2, reset_val, 0),
 	EL2_REG_VNCR(VTCR_EL2, reset_val, 0),
 
-- 
2.39.2



  parent reply	other threads:[~2024-09-03 15:44 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-03 15:38 [PATCH v2 00/16] KVM: arm64: Add EL2 support to FEAT_S1PIE Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 01/16] KVM: arm64: nv: Handle CNTHCTL_EL2 specially Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 02/16] KVM: arm64: nv: Save/Restore vEL2 sysregs Marc Zyngier
2024-09-03 15:38 ` Marc Zyngier [this message]
2024-09-03 15:38 ` [PATCH v2 04/16] KVM: arm64: Add save/restore for TCR2_EL2 Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 05/16] arm64: Add encoding for PIRE0_EL2 Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 06/16] arm64: Remove VNCR definition " Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 07/16] KVM: arm64: Add PIR{,E0}_EL2 to the sysreg arrays Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 08/16] KVM: arm64: Add save/restore for PIR{,E0}_EL2 Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 09/16] KVM: arm64: Handle PIR{,E0}_EL2 traps Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 10/16] KVM: arm64: Sanitise ID_AA64MMFR3_EL1 Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 11/16] KVM: arm64: Split S1 permission evaluation into direct and hierarchical parts Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 12/16] KVM: arm64: Implement AT S1PIE support Marc Zyngier
2024-09-05 13:58   ` Joey Gouly
2024-09-05 14:57     ` Marc Zyngier
2024-09-05 15:37       ` Joey Gouly
2024-09-06  7:04         ` Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 13/16] KVM: arm64: Define helper for EL2 registers with custom visibility Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 14/16] KVM: arm64: Hide TCR2_EL1 from userspace when disabled for guests Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 15/16] KVM: arm64: Hide S1PIE registers " Marc Zyngier
2024-09-03 15:38 ` [PATCH v2 16/16] KVM: arm64: Rely on visibility to let PIR*_ELx/TCR2_ELx UNDEF Marc Zyngier
2024-09-03 15:58   ` Mark Brown

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240903153834.1909472-4-maz@kernel.org \
    --to=maz@kernel.org \
    --cc=alexandru.elisei@arm.com \
    --cc=broonie@kernel.org \
    --cc=james.morse@arm.com \
    --cc=joey.gouly@arm.com \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.linux.dev \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=oliver.upton@linux.dev \
    --cc=suzuki.poulose@arm.com \
    --cc=yuzenghui@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).