From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 07F68CE7B09 for ; Fri, 6 Sep 2024 13:22:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=8qRqVVGUakXBewENW7wRoimQ601cpxlowkifLxm20wY=; b=tbL5ucaf1Emf7IpQz/YTtPWyRH JUAcbgtHq4TZLXwTKkA1//JuCtIsADD3P1cv6Ptw+IIl/Am6VJSZjomHY10lkkp2AfUMBtXxokC0u rCqMOnQNha2cJtkJnzfRAitUSBkcuKoDONisiw2tpEWEmlZOaJpEpszRUbGcX9YarGm3yPXoEV2DM zcZ4wIDnsHwz0Pax2RXIuvooh08EG4mPl/Y90RSSpZB9OWzRvRlg1VGZtgzulp9qMF/LGMTrlmK4O v7XdO2b3BgXD8vb5PTrBUGApHq+nX+vBo0FfPGpzXMssMN0yv6dfalsRQQuRJSTDXMjB/UPdl9dqa 5fCoZMXA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1smYun-0000000CK4C-0Z7m; Fri, 06 Sep 2024 13:22:17 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1smYto-0000000CJye-2IMq for linux-arm-kernel@lists.infradead.org; Fri, 06 Sep 2024 13:21:17 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 30A665C5747; Fri, 6 Sep 2024 13:21:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7C3A6C4CEC5; Fri, 6 Sep 2024 13:21:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1725628875; bh=TPjrVKunEneNgtAAtoKraXxqecJdijK9NzoW/Ve/oRQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=ZiODQgJKj2kJxHs5yYsoWV9IXFfPcGk752TnTbLS9gVVNM+U672am+yV2uxU+re5K +rrE718l33rFBjgDHvTtsVxxHa82M6gT+efTtbPQxmKtVU75q5D3qZ88qvO0U9zIq+ luZfBC4QyRWrPmw4Vtsq7CPVW/UO4GnC3FqyQdiYsoNaaiBp0knnZDjzciw9Z6gfkW dU5wGUp0+r2VkGRxod+7PFotioLgWiBMF4FHDfwX8YoPd28Pta+oaOkOy0AsJ5oWcK 33Id0KaEngMVZfjl1Dt/2/EQmgwMjy9O7t+Y6qqBgqrtlNH2hC9p8lTszWpfVknWxf Oh8riSyEVi03Q== Date: Fri, 6 Sep 2024 14:21:10 +0100 From: Will Deacon To: Jason Gunthorpe Cc: iommu@lists.linux.dev, Joerg Roedel , linux-arm-kernel@lists.infradead.org, Robin Murphy , Michael Shavit , Nicolin Chen , patches@lists.linux.dev, Ryan Roberts , Mostafa Saleh Subject: Re: [PATCH v3 7/9] iommu/arm-smmu-v3: Shrink the cdtab l1_desc array Message-ID: <20240906132109.GC16959@willie-the-truck> References: <0-v3-9fef8cdc2ff6+150d1-smmuv3_tidy_jgg@nvidia.com> <7-v3-9fef8cdc2ff6+150d1-smmuv3_tidy_jgg@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7-v3-9fef8cdc2ff6+150d1-smmuv3_tidy_jgg@nvidia.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240906_062116_710332_3D72029C X-CRM114-Status: GOOD ( 22.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Aug 06, 2024 at 08:31:21PM -0300, Jason Gunthorpe wrote: > The top of the 2 level CD table is (at most) 1024 entries big, and two > high order allocations are required. One of __le64 which is programmed > into the HW (8k) and one of struct arm_smmu_l1_ctx_desc which holds the > CPU pointer (16k). > > There are two copies of the l2ptr_dma, one is stored in the struct > arm_smmu_l1_ctx_desc, and another is encoded in the __le64 for the HW to > use. Instead of storing two copies just decode the value from the __le64. > > Tested-by: Nicolin Chen > Reviewed-by: Nicolin Chen > Signed-off-by: Jason Gunthorpe > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 41 +++++++++------------ > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 - > 2 files changed, 17 insertions(+), 25 deletions(-) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index e6607d9d590c4d..d23a845ad82223 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -1179,31 +1179,19 @@ static void arm_smmu_sync_cd(struct arm_smmu_master *master, > arm_smmu_cmdq_batch_submit(smmu, &cmds); > } > > -static int arm_smmu_alloc_cd_leaf_table(struct arm_smmu_device *smmu, > - struct arm_smmu_l1_ctx_desc *l1_desc) > +static void arm_smmu_write_cd_l1_desc(__le64 *dst, dma_addr_t l2ptr_dma) > { > - size_t size = CTXDESC_L2_ENTRIES * (CTXDESC_CD_DWORDS << 3); > - > - l1_desc->l2ptr = dma_alloc_coherent(smmu->dev, size, > - &l1_desc->l2ptr_dma, GFP_KERNEL); > - if (!l1_desc->l2ptr) { > - dev_warn(smmu->dev, > - "failed to allocate context descriptor table\n"); > - return -ENOMEM; > - } > - return 0; > -} > - > -static void arm_smmu_write_cd_l1_desc(__le64 *dst, > - struct arm_smmu_l1_ctx_desc *l1_desc) > -{ > - u64 val = (l1_desc->l2ptr_dma & CTXDESC_L1_DESC_L2PTR_MASK) | > - CTXDESC_L1_DESC_V; > + u64 val = (l2ptr_dma & CTXDESC_L1_DESC_L2PTR_MASK) | CTXDESC_L1_DESC_V; > > /* The HW has 64 bit atomicity with stores to the L2 CD table */ > WRITE_ONCE(*dst, cpu_to_le64(val)); > } > > +static dma_addr_t arm_smmu_cd_l1_get_desc(const __le64 *src) > +{ > + return le64_to_cpu(*src) & CTXDESC_L1_DESC_L2PTR_MASK; > +} > + > struct arm_smmu_cd *arm_smmu_get_cd_ptr(struct arm_smmu_master *master, > u32 ssid) > { > @@ -1243,13 +1231,17 @@ static struct arm_smmu_cd *arm_smmu_alloc_cd_ptr(struct arm_smmu_master *master, > > l1_desc = &cd_table->l1_desc[idx]; > if (!l1_desc->l2ptr) { > - __le64 *l1ptr; > + dma_addr_t l2ptr_dma; > > - if (arm_smmu_alloc_cd_leaf_table(smmu, l1_desc)) > + l1_desc->l2ptr = dma_alloc_coherent( > + smmu->dev, > + CTXDESC_L2_ENTRIES * sizeof(struct arm_smmu_cd), > + &l2ptr_dma, GFP_KERNEL); Here's another example of the inconsistent indentation. Will