From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BEF1BCD4F4C for ; Sun, 8 Sep 2024 09:02:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=CAOEaV7SoUCQog7FOJMGEXg0PM1gevB7nihoi5a73FU=; b=ukxHDk2wk9RNqICRfzXsIrUKZ5 ebjCnM2yIrVYe9oJT0uE7U2vP/dU5o+swqGxFAr4UrDpobAKQjPpTN5k5kgeR2+NvTgxhjjFrp83w vqKjBFxtXvJgHHfYlVRHpJhvMmKJQCSVO3gpOQU0QS7jp4LNThWbaaEhdiL1G4LBbRQrGGiEsNEuf +Uox/X052F+cqgjpgkMxoudt7xGgTHyKHLkc+dySDTBmi4Z505dBoVza3fQz+LIeEnnqohGgQ3XYi 8LWhCGE+9ItfqFyqAjrL1fEuf0NfdzTOu0f+PUaXvAZP2MwzEMldiMVp/d/uq2ft6hSDOPiRyn+Nd mDY6SdKg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1snDoZ-0000000GRVt-1SQ7; Sun, 08 Sep 2024 09:02:35 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1snDnZ-0000000GRPg-3iWn for linux-arm-kernel@lists.infradead.org; Sun, 08 Sep 2024 09:01:35 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id DAF0DA41539; Sun, 8 Sep 2024 09:01:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 66BB9C4CEC3; Sun, 8 Sep 2024 09:01:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1725786092; bh=xToZsQTiEUaatVECmcZa2xZMNMgV1GnA3jFUHS95k1w=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=me50i/jKYs2q5kBltc2pV4CuxsX/kV/etOvcVWKHIqK1pIw+ZLj+AhC3Kc5CNQN6V 9kQaE/qAxBtF+unG8ULStYZvqUTpFVspnR0wCqFdAlc/KNKsWkdj8XdQUCdPwNFCCB 1re15PnJrZT0nreHlExRZnTZj25k2wx18jgqjkLA= Date: Sun, 8 Sep 2024 11:01:28 +0200 From: Greg Kroah-Hartman To: Nick Chan Cc: Krzysztof Kozlowski , Alim Akhtar , Jiri Slaby , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, asahi@lists.linux.dev Subject: Re: [PATCH 0/3] tty: serial: samsung: Serial fixes for Apple A7-A11 SoCs Message-ID: <2024090809-crusher-overact-8dcd@gregkh> References: <20240908075904.12133-1-towinchenmi@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240908075904.12133-1-towinchenmi@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240908_020134_018542_6C79AA32 X-CRM114-Status: GOOD ( 15.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Sep 08, 2024 at 03:50:47PM +0800, Nick Chan wrote: > Hi, > > This series fixes issues with serial on A7-A11 SoCs. The changes do not > seem to affect existing M1 and up users so they can be applied > unconditionally. > > Firstly, these SoCs require 32-bit writes on the serial port. This only > manifested in earlycon as reg-io-width in device tree is consulted for > normal serial writes. > > Secondly, A7-A9 SoCs seems to use different bits for RXTO and RXTO > enable. Accessing these bits in addition to the original RXTO and RXTO > enable bits will allow serial rx to work correctly on those SoCs. > > Changes in v2: > - Mention A7-A11 in the comment about changing register accesses to > MMIO32. > > - Use BIT() macro for new entries, and change the existing APPLE_S5L_* > entries for consistency. Your subject line does not say "v2" :( Can you resend this as a v3? thanks, greg k-h