From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Joey Gouly <joey.gouly@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Mark Brown <broonie@kernel.org>
Subject: [PATCH v3 00/24] KVM: arm64: Add EL2 support to FEAT_S1PIE
Date: Wed, 11 Sep 2024 14:51:27 +0100 [thread overview]
Message-ID: <20240911135151.401193-1-maz@kernel.org> (raw)
This series serves a few purposes:
- Complete the S1PIE support to include EL2
- Sneak in the EL2 system register world switch
As mentioned in few of the patches, this implementation relies on a
very recent fix to the architecture (D22677 in [0]).
* From v2 [2]:
- Correctly reprogram the context for AT in the fast path when S1PIE
is in use
- Generalised sysreg RES0/RES1 masking, and added TCR2_EL2 RES0/RES1
bit handling
- Fix TCR2_EL1, PIR_EL1, PIRE0_EL1 access with VHE
- Add a bunch of missing registers to get_el2_to_el1_mapping()
- Correctly map {TCR2,PIR,PIRE0}_EL2 to their EL1 equivalent on NV
- Disable hierarchical permissions when S1PIE is enabled
- Make EL2 world switch directly act on the vcpu rather than an
arbitrary context
- Remove SKL{0,1} from the TCR2_EL2 description
* From the initial posting [1]:
- Rebased on top of the AT support branch, which is currently sitting
in kvmarm/next
- Add handling for S1 indirect permission in AT, which I'm sure will
give Alexandru another king-sized headache
- Picked Mark Brown's series [3] dealing with TCRX and S1PIE
visibility, and slapped an extra fix on top for good measure
- Picked up RBs from Joey, with thanks.
[0] https://developer.arm.com/documentation/102105/ka-04/
[1] https://lore.kernel.org/r/20240813144738.2048302-1-maz@kernel.org
[2] https://lore.kernel.org/r/20240903153834.1909472-1-maz@kernel.org
[3] https://lore.kernel.org/r/20240822-kvm-arm64-hide-pie-regs-v2-0-376624fa829c@kernel.org
Marc Zyngier (21):
arm64: Drop SKL0/SKL1 from TCR2_EL2
arm64: Remove VNCR definition for PIRE0_EL2
arm64: Add encoding for PIRE0_EL2
KVM: arm64: nv: Add missing EL2->EL1 mappings in
get_el2_to_el1_mapping()
KVM: arm64: nv: Handle CNTHCTL_EL2 specially
KVM: arm64: nv: Save/Restore vEL2 sysregs
KVM: arm64: Correctly access TCR2_EL1, PIR_EL1, PIRE0_EL1 with VHE
KVM: arm64: Extend masking facility to arbitrary registers
arm64: Define ID_AA64MMFR1_EL1.HAFDBS advertising FEAT_HAFT
KVM: arm64: Add TCR2_EL2 to the sysreg arrays
KVM: arm64: Sanitise TCR2_EL2
KVM: arm64: Add save/restore for TCR2_EL2
KVM: arm64: Add PIR{,E0}_EL2 to the sysreg arrays
KVM: arm64: Add save/restore for PIR{,E0}_EL2
KVM: arm64: Handle PIR{,E0}_EL2 traps
KVM: arm64: Sanitise ID_AA64MMFR3_EL1
KVM: arm64: Add AT fast-path support for S1PIE
KVM: arm64: Split S1 permission evaluation into direct and
hierarchical parts
KVM: arm64: Disable hierarchical permissions when S1PIE is enabled
KVM: arm64: Implement AT S1PIE support
KVM: arm64: Rely on visibility to let PIR*_ELx/TCR2_ELx UNDEF
Mark Brown (3):
KVM: arm64: Define helper for EL2 registers with custom visibility
KVM: arm64: Hide TCR2_EL1 from userspace when disabled for guests
KVM: arm64: Hide S1PIE registers from userspace when disabled for
guests
arch/arm64/include/asm/kvm_host.h | 34 ++-
arch/arm64/include/asm/vncr_mapping.h | 1 -
arch/arm64/kvm/at.c | 322 +++++++++++++++++----
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 5 +-
arch/arm64/kvm/hyp/nvhe/sysreg-sr.c | 2 +-
arch/arm64/kvm/hyp/vhe/sysreg-sr.c | 155 +++++++++-
arch/arm64/kvm/nested.c | 34 ++-
arch/arm64/kvm/sys_regs.c | 129 ++++++++-
arch/arm64/tools/sysreg | 8 +-
include/kvm/arm_arch_timer.h | 3 +
10 files changed, 597 insertions(+), 96 deletions(-)
--
2.39.2
next reply other threads:[~2024-09-11 14:00 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-11 13:51 Marc Zyngier [this message]
2024-09-11 13:51 ` [PATCH v3 01/24] arm64: Drop SKL0/SKL1 from TCR2_EL2 Marc Zyngier
2024-09-12 10:22 ` Joey Gouly
2024-09-11 13:51 ` [PATCH v3 02/24] arm64: Remove VNCR definition for PIRE0_EL2 Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 03/24] arm64: Add encoding " Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 04/24] KVM: arm64: nv: Add missing EL2->EL1 mappings in get_el2_to_el1_mapping() Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 05/24] KVM: arm64: nv: Handle CNTHCTL_EL2 specially Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 06/24] KVM: arm64: nv: Save/Restore vEL2 sysregs Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 07/24] KVM: arm64: Correctly access TCR2_EL1, PIR_EL1, PIRE0_EL1 with VHE Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 08/24] KVM: arm64: Extend masking facility to arbitrary registers Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 09/24] arm64: Define ID_AA64MMFR1_EL1.HAFDBS advertising FEAT_HAFT Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 10/24] KVM: arm64: Add TCR2_EL2 to the sysreg arrays Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 11/24] KVM: arm64: Sanitise TCR2_EL2 Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 12/24] KVM: arm64: Add save/restore for TCR2_EL2 Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 13/24] KVM: arm64: Add PIR{,E0}_EL2 to the sysreg arrays Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 14/24] KVM: arm64: Add save/restore for PIR{,E0}_EL2 Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 15/24] KVM: arm64: Handle PIR{,E0}_EL2 traps Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 16/24] KVM: arm64: Sanitise ID_AA64MMFR3_EL1 Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 17/24] KVM: arm64: Add AT fast-path support for S1PIE Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 18/24] KVM: arm64: Split S1 permission evaluation into direct and hierarchical parts Marc Zyngier
2024-09-11 14:15 ` Joey Gouly
2024-09-11 15:38 ` Marc Zyngier
2024-09-11 15:51 ` Joey Gouly
2024-09-11 16:10 ` Marc Zyngier
2024-09-12 10:04 ` Joey Gouly
2024-09-11 13:51 ` [PATCH v3 19/24] KVM: arm64: Disable hierarchical permissions when S1PIE is enabled Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 20/24] KVM: arm64: Implement AT S1PIE support Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 21/24] KVM: arm64: Define helper for EL2 registers with custom visibility Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 22/24] KVM: arm64: Hide TCR2_EL1 from userspace when disabled for guests Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 23/24] KVM: arm64: Hide S1PIE registers " Marc Zyngier
2024-09-11 13:51 ` [PATCH v3 24/24] KVM: arm64: Rely on visibility to let PIR*_ELx/TCR2_ELx UNDEF Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240911135151.401193-1-maz@kernel.org \
--to=maz@kernel.org \
--cc=alexandru.elisei@arm.com \
--cc=broonie@kernel.org \
--cc=james.morse@arm.com \
--cc=joey.gouly@arm.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=oliver.upton@linux.dev \
--cc=suzuki.poulose@arm.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).