From: "Krzysztof Wilczyński" <kw@linux.com>
To: manivannan.sadhasivam@linaro.org
Cc: Richard Zhu <hongxing.zhu@nxp.com>,
Lucas Stach <l.stach@pengutronix.de>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Rob Herring <robh@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Jingoo Han <jingoohan1@gmail.com>,
Chuanhua Lei <lchuanhua@maxlinear.com>,
Marek Vasut <marek.vasut+renesas@gmail.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
Pratyush Anand <pratyush.anand@gmail.com>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
imx@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-renesas-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org,
abel.vesa@linaro.org, johan+linaro@kernel.org,
Shashank Babu Chinta Venkata <quic_schintav@quicinc.com>,
linux-tegra@vger.kernel.org, Frank Li <Frank.Li@nxp.com>
Subject: Re: [PATCH v7 0/4] PCI: qcom: Add 16.0 GT/s equalization and margining settings
Date: Sat, 14 Sep 2024 07:49:42 +0900 [thread overview]
Message-ID: <20240913224942.GB635227@rocinante> (raw)
In-Reply-To: <20240911-pci-qcom-gen4-stability-v7-0-743f5c1fd027@linaro.org>
Hello,
> This series adds 16.0 GT/s specific equalization and RX lane margining settings
> to the Qcom RC and EP drivers. This series is mandatory for the stable operation
> of the PCIe link at 16.0 GT/s on the Qcom platforms.
>
> NOTE:
> =====
>
> I've taken over the series from Shashank based on the discussion [1]. In order
> to apply the equalization/margining settings properly in the Qcom driver, I
> added the first 2 patches to the series which inevitably touches other vendor
> drivers also.
Applied to controller/qcom, thank you!
[01/04] PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed'
https://git.kernel.org/pci/pci/c/2cebf68a24ab
[02/04] PCI: dwc: Always cache the maximum link speed value in dw_pcie::max_link_speed
https://git.kernel.org/pci/pci/c/19a69cbd9d43
[03/04] PCI: qcom: Add equalization settings for 16.0 GT/s
https://git.kernel.org/pci/pci/c/d45736b59849
[04/04] PCI: qcom: Add RX lane margining settings for 16.0 GT/s
https://git.kernel.org/pci/pci/c/d14bc28af34f
Krzysztof
prev parent reply other threads:[~2024-09-13 22:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-11 15:26 [PATCH v7 0/4] PCI: qcom: Add 16.0 GT/s equalization and margining settings Manivannan Sadhasivam via B4 Relay
2024-09-11 15:26 ` [PATCH v7 1/4] PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed' Manivannan Sadhasivam via B4 Relay
2024-09-11 15:26 ` [PATCH v7 2/4] PCI: dwc: Always cache the maximum link speed value in dw_pcie::max_link_speed Manivannan Sadhasivam via B4 Relay
2024-09-11 15:26 ` [PATCH v7 3/4] PCI: qcom: Add equalization settings for 16.0 GT/s Manivannan Sadhasivam via B4 Relay
2024-09-12 6:08 ` Johan Hovold
2024-09-11 15:26 ` [PATCH v7 4/4] PCI: qcom: Add RX lane margining " Manivannan Sadhasivam via B4 Relay
2024-09-12 6:10 ` Johan Hovold
2024-09-12 6:25 ` [PATCH v7 0/4] PCI: qcom: Add 16.0 GT/s equalization and margining settings Johan Hovold
2024-09-12 6:35 ` Johan Hovold
2024-09-13 22:49 ` Krzysztof Wilczyński [this message]
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