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micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="wyxYEbU3SQR8ONJ3" Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240918_010451_526173_F4C8C2EF X-CRM114-Status: GOOD ( 19.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alexandre.belloni@bootlin.com, geert+renesas@glider.be, dri-devel@lists.freedesktop.org, claudiu.beznea@tuxon.dev, Laurent.pinchart@ideasonboard.com, andrzej.hajda@intel.com, airlied@gmail.com, robh@kernel.org, rfoss@kernel.org, mpe@ellerman.id.au, linux@armlinux.org.uk, jernej.skrabec@gmail.com, Dharma.B@microchip.com, devicetree@vger.kernel.org, conor+dt@kernel.org, tzimmermann@suse.de, arnd@arndb.de, jonas@kwiboo.se, maarten.lankhorst@linux.intel.com, mripard@kernel.org, linux-arm-kernel@lists.infradead.org, neil.armstrong@linaro.org, rdunlap@infradead.org, linux-kernel@vger.kernel.org, daniel@ffwll.ch, krzk+dt@kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --wyxYEbU3SQR8ONJ3 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Sep 18, 2024 at 03:00:45AM +0000, Manikandan.M@microchip.com wrote: > On 17/09/24 6:08 pm, Conor Dooley wrote: > > On Tue, Sep 17, 2024 at 03:16:53AM +0000,Manikandan.M@microchip.com wr= ote: > >> Hi Conor, > >> > >> On 14/08/24 7:29 pm, Conor Dooley wrote: > >>> On Wed, Aug 14, 2024 at 04:22:53PM +0530, Manikandan Muralidharan wro= te: > >>>> + microchip,sfr: > >>>> + $ref: /schemas/types.yaml#/definitions/phandle > >>>> + description: > >>>> + phandle to Special Function Register (SFR) node.To enable the= DSI/CSI > >>>> + selection bit in SFR's ISS Configuration Register. > >>> I'm curious - why is this phandle required? How many SFR nodes are th= ere > >>> on the platform? > >> This phandle is to map the memory region of SFR node and configure the > >> DSI bit in the SFR's ISS configuration register. > >> currently there is only one SFR node in this platform. > > What does "currently" mean? The platform either has one or it does not, > > currently makes it sound like it has more than one but the dts only has > > one. > Apologies, I would like to clarify the statement that this platform only= =20 > has one 32-bit special function register implemented. In that case, you dont need a phandle at all, just look the sfr up by its compatible. --wyxYEbU3SQR8ONJ3 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHQEARYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZuqJnwAKCRB4tDGHoIJi 0ix4AQChrfrTy2bNfbi7J9Cmvc0AkOrqd4lC8oOBGlzlXXvbeAD1HqbkyJyyxQph 0xKmWJd1OCZWfCk7wGtjmG795nIHAA== =/n4k -----END PGP SIGNATURE----- --wyxYEbU3SQR8ONJ3--