From: Frank Li <Frank.Li@nxp.com>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Abraham I" <kishon@kernel.org>,
"Saravana Kannan" <saravanak@google.com>,
"Jingoo Han" <jingoohan1@gmail.com>,
"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
"Jesper Nilsson" <jesper.nilsson@axis.com>,
"Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-kernel@axis.com,
linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Frank Li" <Frank.Li@nxp.com>
Subject: [PATCH v2 3/4] PCI: imx6: Pass correct sub mode when calling phy_set_mode_ext()
Date: Mon, 23 Sep 2024 14:59:21 -0400 [thread overview]
Message-ID: <20240923-pcie_ep_range-v2-3-78d2ea434d9f@nxp.com> (raw)
In-Reply-To: <20240923-pcie_ep_range-v2-0-78d2ea434d9f@nxp.com>
Fix hardcoding to Root Complex (RC) mode by adding a drvdata mode check.
Pass PHY_MODE_PCIE_EP if the PCI controller operates in Endpoint (EP) mode.
Fixes: 8026f2d8e8a9 ("PCI: imx6: Call common PHY API to set mode, speed, and submode")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 808d1f1054173..bdc2b372e6c13 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -961,7 +961,9 @@ static int imx_pcie_host_init(struct dw_pcie_rp *pp)
goto err_clk_disable;
}
- ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE, PHY_MODE_PCIE_RC);
+ ret = phy_set_mode_ext(imx_pcie->phy, PHY_MODE_PCIE,
+ imx_pcie->drvdata->mode == DW_PCIE_EP_TYPE ?
+ PHY_MODE_PCIE_EP : PHY_MODE_PCIE_RC);
if (ret) {
dev_err(dev, "unable to set PCIe PHY mode\n");
goto err_phy_exit;
--
2.34.1
next prev parent reply other threads:[~2024-09-23 19:04 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-23 18:59 [PATCH v2 0/4] PCI: ep: dwc/imx6: Add bus address support for PCI endpoint devices Frank Li
2024-09-23 18:59 ` [PATCH v2 1/4] PCI: dwc: ep: Add bus_addr_base for outbound window Frank Li
2024-10-16 18:08 ` Manivannan Sadhasivam
2024-10-16 19:10 ` Frank Li
2024-09-23 18:59 ` [PATCH v2 2/4] dt-bindings: PCI: fsl,imx6q-pcie-ep: Add compatible string fsl,imx8q-pcie-ep Frank Li
2024-09-24 16:33 ` Conor Dooley
2024-09-23 18:59 ` Frank Li [this message]
2024-09-25 3:06 ` [PATCH v2 3/4] PCI: imx6: Pass correct sub mode when calling phy_set_mode_ext() Hongxing Zhu
2024-10-16 18:12 ` Manivannan Sadhasivam
2024-09-23 18:59 ` [PATCH v2 4/4] PCI: imx6: Add i.MX8Q PCIe Endpoint (EP) support Frank Li
2024-09-25 3:05 ` Hongxing Zhu
2024-10-16 18:14 ` Manivannan Sadhasivam
2024-10-04 20:24 ` [PATCH v2 0/4] PCI: ep: dwc/imx6: Add bus address support for PCI endpoint devices Frank Li
2024-10-16 16:20 ` Frank Li
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