From: Ryan Walklin <ryan@testtoast.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: Andre Przywara <andre.przywara@arm.com>,
Chris Morgan <macroalpha82@gmail.com>,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, Ryan Walklin <ryan@testtoast.com>
Subject: [PATCH v5 12/26] drm: sun4i: support YUV formats in VI scaler
Date: Sun, 29 Sep 2024 22:04:44 +1300 [thread overview]
Message-ID: <20240929091107.838023-13-ryan@testtoast.com> (raw)
In-Reply-To: <20240929091107.838023-1-ryan@testtoast.com>
From: Jernej Skrabec <jernej.skrabec@gmail.com>
Now that YUV formats are available, enable support in the VI scaler.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Ryan Walklin <ryan@testtoast.com>
Changelog v4..v5:
- Add commit description
---
drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 85 +++++++++++++++++--------
1 file changed, 58 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
index 7ba75011adf9f..2e49a6e5f1f1c 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c
@@ -843,6 +843,11 @@ static u32 sun8i_vi_scaler_base(struct sun8i_mixer *mixer, int channel)
DE2_VI_SCALER_UNIT_SIZE * channel;
}
+static bool sun8i_vi_scaler_is_vi_plane(struct sun8i_mixer *mixer, int channel)
+{
+ return true;
+}
+
static int sun8i_vi_scaler_coef_index(unsigned int step)
{
unsigned int scale, int_part, float_part;
@@ -867,44 +872,65 @@ static int sun8i_vi_scaler_coef_index(unsigned int step)
}
}
-static void sun8i_vi_scaler_set_coeff(struct regmap *map, u32 base,
- u32 hstep, u32 vstep,
- const struct drm_format_info *format)
+static void sun8i_vi_scaler_set_coeff_vi(struct regmap *map, u32 base,
+ u32 hstep, u32 vstep,
+ const struct drm_format_info *format)
{
const u32 *ch_left, *ch_right, *cy;
- int offset, i;
+ int offset;
- if (format->hsub == 1 && format->vsub == 1) {
- ch_left = lan3coefftab32_left;
- ch_right = lan3coefftab32_right;
- cy = lan2coefftab32;
- } else {
+ if (format->is_yuv) {
ch_left = bicubic8coefftab32_left;
ch_right = bicubic8coefftab32_right;
cy = bicubic4coefftab32;
+ } else {
+ ch_left = lan3coefftab32_left;
+ ch_right = lan3coefftab32_right;
+ cy = lan2coefftab32;
}
offset = sun8i_vi_scaler_coef_index(hstep) *
SUN8I_VI_SCALER_COEFF_COUNT;
- for (i = 0; i < SUN8I_VI_SCALER_COEFF_COUNT; i++) {
- regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, i),
- lan3coefftab32_left[offset + i]);
- regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF1(base, i),
- lan3coefftab32_right[offset + i]);
- regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, i),
- ch_left[offset + i]);
- regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF1(base, i),
- ch_right[offset + i]);
- }
+ regmap_bulk_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, 0),
+ &lan3coefftab32_left[offset],
+ SUN8I_VI_SCALER_COEFF_COUNT);
+ regmap_bulk_write(map, SUN8I_SCALER_VSU_YHCOEFF1(base, 0),
+ &lan3coefftab32_right[offset],
+ SUN8I_VI_SCALER_COEFF_COUNT);
+ regmap_bulk_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, 0),
+ &ch_left[offset], SUN8I_VI_SCALER_COEFF_COUNT);
+ regmap_bulk_write(map, SUN8I_SCALER_VSU_CHCOEFF1(base, 0),
+ &ch_right[offset], SUN8I_VI_SCALER_COEFF_COUNT);
offset = sun8i_vi_scaler_coef_index(hstep) *
SUN8I_VI_SCALER_COEFF_COUNT;
- for (i = 0; i < SUN8I_VI_SCALER_COEFF_COUNT; i++) {
- regmap_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, i),
- lan2coefftab32[offset + i]);
- regmap_write(map, SUN8I_SCALER_VSU_CVCOEFF(base, i),
- cy[offset + i]);
- }
+ regmap_bulk_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, 0),
+ &lan2coefftab32[offset], SUN8I_VI_SCALER_COEFF_COUNT);
+ regmap_bulk_write(map, SUN8I_SCALER_VSU_CVCOEFF(base, 0),
+ &cy[offset], SUN8I_VI_SCALER_COEFF_COUNT);
+}
+
+static void sun8i_vi_scaler_set_coeff_ui(struct regmap *map, u32 base,
+ u32 hstep, u32 vstep,
+ const struct drm_format_info *format)
+{
+ const u32 *table;
+ int offset;
+
+ offset = sun8i_vi_scaler_coef_index(hstep) *
+ SUN8I_VI_SCALER_COEFF_COUNT;
+ regmap_bulk_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, 0),
+ &lan2coefftab32[offset], SUN8I_VI_SCALER_COEFF_COUNT);
+ offset = sun8i_vi_scaler_coef_index(vstep) *
+ SUN8I_VI_SCALER_COEFF_COUNT;
+ regmap_bulk_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, 0),
+ &lan2coefftab32[offset], SUN8I_VI_SCALER_COEFF_COUNT);
+
+ table = format->is_yuv ? bicubic4coefftab32 : lan2coefftab32;
+ offset = sun8i_vi_scaler_coef_index(hstep) *
+ SUN8I_VI_SCALER_COEFF_COUNT;
+ regmap_bulk_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, 0),
+ &table[offset], SUN8I_VI_SCALER_COEFF_COUNT);
}
void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable)
@@ -994,6 +1020,11 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
SUN8I_SCALER_VSU_CHPHASE(base), chphase);
regmap_write(mixer->engine.regs,
SUN8I_SCALER_VSU_CVPHASE(base), cvphase);
- sun8i_vi_scaler_set_coeff(mixer->engine.regs, base,
- hscale, vscale, format);
+
+ if (sun8i_vi_scaler_is_vi_plane(mixer, layer))
+ sun8i_vi_scaler_set_coeff_vi(mixer->engine.regs, base,
+ hscale, vscale, format);
+ else
+ sun8i_vi_scaler_set_coeff_ui(mixer->engine.regs, base,
+ hscale, vscale, format);
}
--
2.46.1
next prev parent reply other threads:[~2024-09-29 9:27 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-29 9:04 [PATCH v5 00/26] drm: sun4i: add Display Engine 3.3 (DE33) support Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 01/26] drm: sun4i: de2/de3: Change CSC argument Ryan Walklin
2024-10-19 14:11 ` Dmitry Baryshkov
2025-02-15 1:17 ` Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 02/26] drm: sun4i: de2/de3: Merge CSC functions into one Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 03/26] drm: sun4i: de2/de3: call csc setup also for UI layer Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 04/26] drm: sun4i: de2: Initialize layer fields earlier Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 05/26] drm: sun4i: de3: Add YUV formatter module Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 06/26] drm: sun4i: de3: add format enumeration function to engine Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 07/26] drm: sun4i: de3: add formatter flag to mixer config Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 08/26] drm: sun4i: de3: add YUV support to the DE3 mixer Ryan Walklin
2024-10-19 14:14 ` Dmitry Baryshkov
2025-02-15 1:18 ` Ryan Walklin
2025-02-15 3:48 ` Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 09/26] drm: sun4i: de3: pass engine reference to ccsc setup function Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 10/26] drm: sun4i: de3: add YUV support to the color space correction module Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 11/26] drm: sun4i: de3: add YUV support to the TCON Ryan Walklin
2024-09-29 9:04 ` Ryan Walklin [this message]
2024-09-29 9:04 ` [PATCH v5 13/26] drm: sun4i: de2/de3: add mixer version enum Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 14/26] drm: sun4i: de2/de3: refactor mixer initialisation Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 15/26] drm: sun4i: vi_scaler refactor vi_scaler enablement Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 16/26] drm: sun4i: de2/de3: add generic blender register reference function Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 17/26] drm: sun4i: de2/de3: use generic register reference function for layer configuration Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 18/26] drm: sun4i: de3: Implement AFBC support Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 19/26] dt-bindings: allwinner: add H616 DE33 bus binding Ryan Walklin
2025-02-12 17:27 ` Chris Morgan
2024-09-29 9:04 ` [PATCH v5 20/26] dt-bindings: allwinner: add H616 DE33 clock binding Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 21/26] dt-bindings: allwinner: add H616 DE33 mixer binding Ryan Walklin
2025-02-12 17:31 ` Chris Morgan
2024-09-29 9:04 ` [PATCH v5 22/26] clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 23/26] drm: sun4i: de33: mixer: " Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 24/26] drm: sun4i: de33: vi_scaler: " Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 25/26] drm: sun4i: de33: fmt: " Ryan Walklin
2024-09-29 9:04 ` [PATCH v5 26/26] drm: sun4i: de33: csc: " Ryan Walklin
2024-09-30 13:30 ` [PATCH v5 00/26] drm: sun4i: " Philippe Simons
2025-02-12 17:25 ` Chris Morgan
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