From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 864FDCEB2EE for ; Tue, 1 Oct 2024 04:32:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=fIMPtVAgDdk3uLyzPQoRbk42MNvjw1QLbp3qkucfoy4=; b=uLvHB3Y49yLXAwrJBsuMnlLg6V 3o6G2RCtY4JCLY2N33PWV0VzaK6Gq/AXKXYhfWSFix6P/k/3/hJlDbiGobBFnukSwq1Ec+dO8W+on REIcrvBm/94xiIP4uJ/8iiz5/6FQipfWMbV4B5JbXkYH/OHkxBIFCAg7GRbEskiezwYLH31hbL3// jBYTpUhmXOjcUhA5ADxhxg/3x4XDF8zdwimZ9/zQRwztzKPhZKARmjdZUhfZ87nC6bkD2Dj4LGd/U 8K1a4iDqeUJ3OeBMiNIgC7L90nVkxBDI+PhzkRWr6H5eGpntIFp1vcWMtKK7rtwY7DijlHp157jbT cJJfaLUg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svUYC-00000001ZPq-0JVd; Tue, 01 Oct 2024 04:31:52 +0000 Received: from layka.disroot.org ([178.21.23.139]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1svUSM-00000001YPN-0wVf; Tue, 01 Oct 2024 04:25:51 +0000 Received: from mail01.disroot.lan (localhost [127.0.0.1]) by disroot.org (Postfix) with ESMTP id 0867823CB2; Tue, 1 Oct 2024 06:25:49 +0200 (CEST) X-Virus-Scanned: SPAM Filter at disroot.org Received: from layka.disroot.org ([127.0.0.1]) by localhost (disroot.org [127.0.0.1]) (amavis, port 10024) with ESMTP id EQi-h7-SyM0d; Tue, 1 Oct 2024 06:25:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1727756748; bh=g3/xsaggoBD8STCM4ioqMxyKkwu2ClnVteNZa156RfA=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=KTHaUHi1CaAPViTnRp4BcBT/sKGPTXc54XXajNENC0cMFzf3fe7XB/TMz/nIZoKxZ 9bO5sZ2xuKZ1kWtbp4uh3dc2gRCYDnphjrfbS2pSvXeCdbMHfabSCq7QTNuKjMpstA SmC9SJc0iUh8JppZXanppafF9RaIyIIjucv1O0qoKMBXIrJWQGuQAxWNJI4TDvjWDt AmPgfbu4ki53n0Vyl8EEK9yHx1nuJtifBZCM5TnnVIUYxzlnOVMmDVcmtHmenP1Uyv zzZ6SY2jaZl1H1q171JJRHoexOR34HzXWjATQhMuWnFRhNAav6t1Pf7JE0m08zFCZw glskzc2BSudwQ== From: Yao Zi To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Philipp Zabel Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Celeste Liu , Yao Zi Subject: [PATCH 4/8] clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE Date: Tue, 1 Oct 2024 04:23:58 +0000 Message-ID: <20241001042401.31903-6-ziyao@disroot.org> In-Reply-To: <20241001042401.31903-2-ziyao@disroot.org> References: <20241001042401.31903-2-ziyao@disroot.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240930_212550_420335_34F28BF9 X-CRM114-Status: GOOD ( 13.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RK3528 comes with a new PLL type, flagged by ROCKCHIP_PLL_FIXED_MODE, which should operate in normal mode only. Add corresponding definition and handle it in code. Signed-off-by: Yao Zi --- drivers/clk/rockchip/clk-pll.c | 10 ++++++---- drivers/clk/rockchip/clk.h | 2 ++ 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index 606ce5458f54..46be1c67301a 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -204,10 +204,12 @@ static int rockchip_rk3036_pll_set_params(struct rockchip_clk_pll *pll, rockchip_rk3036_pll_get_params(pll, &cur); cur.rate = 0; - cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); - if (cur_parent == PLL_MODE_NORM) { - pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); - rate_change_remuxed = 1; + if (!(pll->flags & ROCKCHIP_PLL_FIXED_MODE)) { + cur_parent = pll_mux_ops->get_parent(&pll_mux->hw); + if (cur_parent == PLL_MODE_NORM) { + pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); + rate_change_remuxed = 1; + } } /* update pll values */ diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index fd3b476dedda..1efc5c3a1e77 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -391,6 +391,7 @@ struct rockchip_pll_rate_table { * Flags: * ROCKCHIP_PLL_SYNC_RATE - check rate parameters to match against the * rate_table parameters and ajust them if necessary. + * ROCKCHIP_PLL_FIXED_MODE - the pll operates in normal mode only */ struct rockchip_pll_clock { unsigned int id; @@ -408,6 +409,7 @@ struct rockchip_pll_clock { }; #define ROCKCHIP_PLL_SYNC_RATE BIT(0) +#define ROCKCHIP_PLL_FIXED_MODE BIT(1) #define PLL(_type, _id, _name, _pnames, _flags, _con, _mode, _mshift, \ _lshift, _pflags, _rtable) \ -- 2.46.0