From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 094E4CF31B7 for ; Wed, 2 Oct 2024 12:48:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Subject:Cc:To: From:Date:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qYZmngo8Akclg+S7qnBbh5hBasgfuQJ2bFb2p9LdGC4=; b=ejRQ5ud2Kcr+c480Ddjd09OVbW rJ83BI2GInKySzr2th0xEtPOo9k4pmrrCr+fnb1bX7FrF44BsYk4DeCwihWBOk6spum3lSSI8+b2W mA9rQQtJtf8Zhn15jQnpUQETvtpTPY32h3fMCqHyUfisBf+qsQVYsOha2HWZiIr/C8jQoBxE+boPc wqueAeNm9bu0D2SvnDUzDxQ74yZzYyDy0uUhvIPBA7KiC+1JXwyXVXFA6ZX1ADm3uaUD55OMV6FiW nyNDxpcTWpH4b1xtIbReg0YBIKzlK9yuHaZwqgRT0Zxub8VN3mJXCbFnkx6ZnyWc/tGAE489GGUPi amDRtgcA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svyli-00000005y99-1Cja; Wed, 02 Oct 2024 12:47:50 +0000 Received: from relay1-d.mail.gandi.net ([217.70.183.193]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1svyfY-00000005vzZ-45Xi for linux-arm-kernel@lists.infradead.org; Wed, 02 Oct 2024 12:41:31 +0000 Received: by mail.gandi.net (Postfix) with ESMTPSA id 05CB3240005; Wed, 2 Oct 2024 12:41:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1727872885; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qYZmngo8Akclg+S7qnBbh5hBasgfuQJ2bFb2p9LdGC4=; b=cfdNCCY5cEy03ATLTYtqzshKCSsOFcXvOwP4LW/qwI+tuYRZ8pvez7eyWrvgLhUwXnIpbq Dxh8CER0uZUfXx035l1XCzawmG7ANRyFDVLT9sI+TpimuiAvBXDJECXzejJYY/Vkaz269k OpM1YNVhttp+UIccvQYtyGojliCLxh4d42is77eKrVC9tGtz0TmK1V58tx3coovrq+/cwy wbk4nl01W709SJPq20fnwIwkpEje3TiPOR9r+0V79QgFEvR30KsoYL3nnP+DFCN7ZAMXZc UrjujYb5CtzDZ+wzyqae1XUu1peLwwrDxKc3AQwzgs1NIu/ULu0fSsHpOiq36A== Date: Wed, 2 Oct 2024 14:41:19 +0200 From: Herve Codina To: "Arnd Bergmann" Cc: "Geert Uytterhoeven" , "Andy Shevchenko" , "Simon Horman" , "Lee Jones" , "derek.kiernan@amd.com" , "dragan.cvetic@amd.com" , "Greg Kroah-Hartman" , "Bjorn Helgaas" , "Philipp Zabel" , "Lars Povlsen" , "Steen Hegelund" , "Daniel Machon" , UNGLinuxDriver@microchip.com, "Rob Herring" , "Krzysztof Kozlowski" , "Conor Dooley" , "Saravana Kannan" , "David S . Miller" , "Eric Dumazet" , "Jakub Kicinski" , "Paolo Abeni" , "Horatiu Vultur" , "Andrew Lunn" , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Netdev , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "Allan Nielsen" , "Luca Ceresoli" , "Thomas Petazzoni" Subject: Re: [PATCH v6 3/7] misc: Add support for LAN966x PCI device Message-ID: <20241002144119.45c78aa7@bootlin.com> In-Reply-To: References: <20240930121601.172216-1-herve.codina@bootlin.com> <20240930121601.172216-4-herve.codina@bootlin.com> Organization: Bootlin X-Mailer: Claws Mail 4.3.0 (GTK 3.24.43; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-GND-Sasl: herve.codina@bootlin.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241002_054129_454665_8ADC1D6B X-CRM114-Status: GOOD ( 18.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Arnd, On Wed, 02 Oct 2024 11:08:15 +0000 "Arnd Bergmann" wrote: > On Mon, Sep 30, 2024, at 12:15, Herve Codina wrote: > > > + pci-ep-bus@0 { > > + compatible = "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + /* > > + * map @0xe2000000 (32MB) to BAR0 (CPU) > > + * map @0xe0000000 (16MB) to BAR1 (AMBA) > > + */ > > + ranges = <0xe2000000 0x00 0x00 0x00 0x2000000 > > + 0xe0000000 0x01 0x00 0x00 0x1000000>; > > I was wondering about how this fits into the PCI DT > binding, is this a child of the PCI device, or does the > "pci-ep-bus" refer to the PCI device itself? This is a child of the PCI device. The overlay is applied at the PCI device node and so, the pci-ep-bus is a child of the PCI device node. > > Where do the "0x01 0x00 0x00" and "0x00 0x00 0x00" addresses > come from? Shouldn't those be "02000010 0x00 0x00" and > "02000014 0x00 0x00" to refer to the first and second > relocatable 32-bit memory BAR? These addresses are built dynamically by the PCI core during the PCI scan. https://elixir.bootlin.com/linux/v6.11/source/drivers/pci/of_property.c#L101 They are use to reference the BARs. 0x00 for BAR0, 0x01 for BAR1, ... The full DT, once PCI device are present, scanned and the overlay applied, looks like the following: --- 8< --- pcie@d0070000 { /* Node present on the base device tree */ compatible = "marvell,armada-3700-pcie"; #address-cells = <0x03>; #size-cells = <0x02>; ranges = <0x82000000 0x00 0xe8000000 0x00 0xe8000000 0x00 0x7f00000 0x81000000 0x00 0x00 0x00 0xefff0000 0x00 0x10000>; device_type = "pci"; ... pci@0,0 { /* * Node created at runtime during the PCI scan * This node is PCI bridge (class 604) */ #address-cells = <0x03>; #size-cells = <0x02>; device_type = "pci"; compatible = "pci11ab,100\0pciclass,060400\0pciclass,0604"; ranges = <0x82000000 0x00 0xe8000000 0x82000000 0x00 0xe8000000 0x00 0x4400000>; ... dev@0,0 { /* * Node created at runtime during the * PCI scan. This is my LAN966x PCI device. */ #address-cells = <0x03>; interrupts = <0x01>; #size-cells = <0x02>; compatible = "pci1055,9660\0pciclass,020000\0pciclass,0200"; /* * Ranges items allow to reference BAR0, * BAR1, ... from children nodes. * The property is created by the PCI core * during the PCI bus scan. */ ranges = <0x00 0x00 0x00 0x82010000 0x00 0xe8000000 0x00 0x2000000 0x01 0x00 0x00 0x82010000 0x00 0xea000000 0x00 0x1000000 0x02 0x00 0x00 0x82010000 0x00 0xeb000000 0x00 0x800000 0x03 0x00 0x00 0x82010000 0x00 0xeb800000 0x00 0x800000 0x04 0x00 0x00 0x82010000 0x00 0xec000000 0x00 0x20000 0x05 0x00 0x00 0x82010000 0x00 0xec020000 0x00 0x2000>; ... pci-ep-bus@0 { /* Node added by the overlay */ #address-cells = <0x01>; #size-cells = <0x01>; compatible = "simple-bus"; /* * Remap 0xe2000000 to BAR0 and * 0xe0000000 to BAR1 */ ranges = <0xe2000000 0x00 0x00 0x00 0x2000000 0xe0000000 0x01 0x00 0x00 0x1000000>; ... mdio@e200413c { #address-cells = <0x01>; resets = <0x25 0x00>; #size-cells = <0x00>; compatible = "microchip,lan966x-miim"; reg = <0xe200413c 0x24 0xe2010020 0x04>; ... --- 8< --- Hope this full picture helped to understand the address translations involved. Best regards, Hervé