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[142.68.128.5]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6cb3b6008efsm64396736d6.15.2024.10.02.12.40.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Oct 2024 12:40:04 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.95) (envelope-from ) id 1sw5Ce-00AE5g-Gg; Wed, 02 Oct 2024 16:40:04 -0300 Date: Wed, 2 Oct 2024 16:40:04 -0300 From: Jason Gunthorpe To: Nicolin Chen Cc: Yang Shi , james.morse@arm.com, will@kernel.org, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [v2 PATCH] iommu/arm-smmu-v3: Fix L1 stream table index calculation for 32-bit sid size Message-ID: <20241002194004.GT1369530@ziepe.ca> References: <20241002175514.1165299-1-yang@os.amperecomputing.com> <1c9767e1-4d05-4650-bc14-65a18fc63cc2@os.amperecomputing.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241002_124006_922461_B0D04C0C X-CRM114-Status: GOOD ( 16.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Oct 02, 2024 at 12:22:48PM -0700, Nicolin Chen wrote: > On Wed, Oct 02, 2024 at 12:04:32PM -0700, Yang Shi wrote: > > > On Wed, Oct 02, 2024 at 10:55:14AM -0700, Yang Shi wrote: > > > > +static inline unsigned int arm_smmu_strtab_max_sid(struct arm_smmu_device *smmu) > > > > +{ > > > > + return (1ULL << smmu->sid_bits); > > > > +} > > > > + > > > Hmm, why ULL gets truncated to unsigned int here? > > > > No particular reason, but it should be better to not truncate here. Will > > fix it. > > Yea, and looks like we are going to do with: > static inline u64 arm_smmu_strtab_num_sids(struct arm_smmu_device *smmu); > > Then let's be careful at those return-value holders too: > ----------------------------------------------------------- > static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu) > { > u32 size; > struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; > > size = (1 << smmu->sid_bits) * sizeof(struct arm_smmu_ste); > ^^^^ > overflow? > [...] > cfg->linear.num_ents = 1 << smmu->sid_bits; > ^^^^^^^^ > This is u32 > ----------------------------------------------------------- It would make some sense to have something like: u64 size = arm_smmu_strtab_max_sid() /* Would require too much memory */ if (size > SZ_512M) return -EINVAL; Just to reject bad configuration rather than truncate the allocation and overflow STE array memory or something. Having drivers be robust to this kind of stuff is a confidential compute topic :\ Jason