From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DC69D1812A for ; Mon, 14 Oct 2024 15:38:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=CSduFTZizRlhqUxo3AV+NTOlAr8E9vLvliwKWMeu2Mg=; b=DZZiBaa9oso2cwVeASCYwyCJqV iEqSM1bLUTAQToTowjqFNQ6GAMUZOYT24oQUP8PUvfl629QMTbAs+rXd7fkiPcM9ooKJj/6Ar/wv1 p1Dgd6Qnk+LXdmAx6YnB2HZflfbNSeYH6QaAmC8NZscsC3NepSVB//IGDSWnMo97U4q4gbqQn4XBY IO/KUezb1VCzKR/ZjOOe9KJ5t8mzj6yh4Sr5caBlBr7QD7y9fIZMx8IBkSxqqigsXkkyKaRRcI4vX Yu1ndJ8SJsVtItcvJ6T2hVWzq/qe3cD4WG1+3t+2oJWrub1WbaDClOa111TMxI5bRiU8/Dffqty+k aCU+l8Hw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t0N8z-00000005iIb-1XGk; Mon, 14 Oct 2024 15:38:01 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t0MwZ-00000005djo-0NlG for linux-arm-kernel@bombadil.infradead.org; Mon, 14 Oct 2024 15:25:11 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=CSduFTZizRlhqUxo3AV+NTOlAr8E9vLvliwKWMeu2Mg=; b=oh58HasDrxttiSrCP33Nh2aKgW 1yNxijhjo+17+uDvuxr5yWy2KuN3skvbQsl4UcdCwQM3vnvAkeXN12vNM/gXbliyCT/x/x0gAxK74 +I4o2e4xZo7/NZXpsGz5ow600YecCyHmJtvclRn3F4PpeIocsg5mEsH6dzm5L3hhvrm5N9BimhFNa 2LRHrIxaPIHe7qexgYFThXBBjelSntrwhW7OcMsUD9pS68owWhdAGRScfwy0tQ4XKZ0VEuTqEOhsI Z/Zj4kU9lRi6viKCqMRBE/X6zCl4SCipaE26J5Vp6ihtxl0c36nB7Zhs9dZ/hKKxWs5derghGhgOj hwHYOs5A==; Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by desiato.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t0MwU-00000006N0r-1jsF for linux-arm-kernel@lists.infradead.org; Mon, 14 Oct 2024 15:25:09 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 6B032A4237A; Mon, 14 Oct 2024 15:24:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3FFD7C4CEC3; Mon, 14 Oct 2024 15:25:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1728919502; bh=1GoaPfLQ84iWGdlMtTwtwD5xjUpqEJmFCGIhxXHA0q0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QeI6S4SUhYpSgimP4UGiLNrCdTShZ2vhFcqoiR3Q47fh5YlBhE0U49sfN98EoUztx vq21kJImqh9R3WTPuT99R7l9sxA5jhR02oaeEgG80ew8nvhDTEXtmYeD4KZ4zMQckK d1UQitE9ZdU0Y519GEqfyN6x95GFAQ1rG7VLSQX0= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Catalin Marinas , Will Deacon , Suzuki K Poulose , James Morse , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Anshuman Khandual , Mark Rutland , Sasha Levin Subject: [PATCH 6.1 624/798] arm64: Add Cortex-715 CPU part definition Date: Mon, 14 Oct 2024 16:19:38 +0200 Message-ID: <20241014141242.554119006@linuxfoundation.org> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241014141217.941104064@linuxfoundation.org> References: <20241014141217.941104064@linuxfoundation.org> User-Agent: quilt/0.67 X-stable: review X-Patchwork-Hint: ignore MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241014_162507_368570_03777739 X-CRM114-Status: GOOD ( 10.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org 6.1-stable review patch. If anyone has any objections, please let me know. ------------------ From: Anshuman Khandual [ Upstream commit 07e39e60bbf0ccd5f895568e1afca032193705c0 ] Add the CPU Partnumbers for the new Arm designs. Cc: Catalin Marinas Cc: Will Deacon Cc: Suzuki K Poulose Cc: James Morse Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Acked-by: Catalin Marinas Signed-off-by: Anshuman Khandual Link: https://lore.kernel.org/r/20221116140915.356601-2-anshuman.khandual@arm.com Signed-off-by: Will Deacon [ Mark: Trivial backport ] Signed-off-by: Mark Rutland Signed-off-by: Sasha Levin --- arch/arm64/include/asm/cputype.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index a0a028a6b9670..9916346948ba2 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -82,6 +82,7 @@ #define ARM_CPU_PART_CORTEX_A510 0xD46 #define ARM_CPU_PART_CORTEX_A520 0xD80 #define ARM_CPU_PART_CORTEX_A710 0xD47 +#define ARM_CPU_PART_CORTEX_A715 0xD4D #define ARM_CPU_PART_CORTEX_X2 0xD48 #define ARM_CPU_PART_NEOVERSE_N2 0xD49 #define ARM_CPU_PART_CORTEX_A78C 0xD4B @@ -156,6 +157,7 @@ #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510) #define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520) #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) +#define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715) #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2) #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C) -- 2.43.0