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From: Bjorn Helgaas <helgaas@kernel.org>
To: Frank Li <Frank.li@nxp.com>
Cc: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Abraham I" <kishon@kernel.org>,
	"Saravana Kannan" <saravanak@google.com>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Gustavo Pimentel" <gustavo.pimentel@synopsys.com>,
	"Jesper Nilsson" <jesper.nilsson@axis.com>,
	"Richard Zhu" <hongxing.zhu@nxp.com>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Pengutronix Kernel Team" <kernel@pengutronix.de>,
	"Fabio Estevam" <festevam@gmail.com>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-kernel@axis.com,
	linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Conor Dooley" <conor.dooley@microchip.com>
Subject: Re: [PATCH v4 0/4] PCI: ep: dwc/imx6: Add bus address support for PCI endpoint devices
Date: Fri, 25 Oct 2024 16:36:26 -0500	[thread overview]
Message-ID: <20241025213626.GA1030542@bhelgaas> (raw)
In-Reply-To: <ZxwH//clayRL2emF@lizhi-Precision-Tower-5810>

On Fri, Oct 25, 2024 at 05:05:03PM -0400, Frank Li wrote:
> On Fri, Oct 25, 2024 at 03:48:18PM -0500, Bjorn Helgaas wrote:
> > On Thu, Oct 24, 2024 at 04:41:42PM -0400, Frank Li wrote:
> > > Endpoint          Root complex
> > >                              ┌───────┐        ┌─────────┐
> > >                ┌─────┐       │ EP    │        │         │      ┌─────┐
> > >                │     │       │ Ctrl  │        │         │      │ CPU │
> > >                │ DDR │       │       │        │ ┌────┐  │      └──┬──┘
> > >                │     │◄──────┼─ATU ◄─┼────────┼─┤BarN│◄─┼─────────┘
> > >                │     │       │       │        │ └────┘  │ Outbound Transfer
> > >                └─────┘       │       │        │         │
> > >                              │       │        │         │
> > >                              │       │        │         │
> > >                              │       │        │         │ Inbound Transfer
> > >                              │       │        │         │      ┌──▼──┐
> > >               ┌───────┐      │       │        │ ┌───────┼─────►│DDR  │
> > >               │       │ outbound Transfer*    │ │       │      └─────┘
> > >    ┌─────┐    │ Bus   ┼─────►│ ATU  ─┬────────┼─┘       │
> > >    │     │    │ Fabric│Bus   │       │ PCI Addr         │
> > >    │ CPU ├───►│       │Addr  │       │ 0xA000_0000      │
> > >    │     │CPU │       │0x8000_0000   │        │         │
> > >    └─────┘Addr└───────┘      │       │        │         │
> > >           0x7000_0000        └───────┘        └─────────┘
> > >
> > > Add `bus_addr_base` to configure the outbound window address for CPU write.
> > > The BUS fabric generally passes the same address to the PCIe EP controller,
> > > but some BUS fabrics convert the address before sending it to the PCIe EP
> > > controller.
> > >
> > > Above diagram, CPU write data to outbound windows address 0x7000_0000,
> > > Bus fabric convert it to 0x8000_0000. ATU should use BUS address
> > > 0x8000_0000 as input address and convert to PCI address 0xA000_0000.
> >
> > The above doesn't match what's in patch 1/4, and I think the version
> > in 1/4 is better, so I'll comment there.
> >
> > To avoid confusion, it might be better not to duplicate it in 0/4 and
> > 1/4.
> 
> Yes, cover letter don't come into git tree. This part is common and
> important, It is not good just said ref to patch1 commit message.
> 
> Add do you have addition comment about this and
> https://lore.kernel.org/imx/20241015-pci_fixup_addr-v5-0-ced556c85270@nxp.com/T/#t
> 
> The both are the pave the road to clean up pci_fixup_addr().

I think it would be helpful to combine the "PCI: dwc: optimize RC host
pci_fixup_addr()" series and the "bus_addr_base" parts of this series
together into a single series because they are doing very similar
things, and it's easier to review them together.

And split the dt-bindings, PHY sub mode, and new endpoint support
parts to their own series because they're not related to the address
translation changes.

Bjorn


  reply	other threads:[~2024-10-25 21:38 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-24 20:41 [PATCH v4 0/4] PCI: ep: dwc/imx6: Add bus address support for PCI endpoint devices Frank Li
2024-10-24 20:41 ` [PATCH v4 1/4] PCI: dwc: ep: Add bus_addr_base for outbound window Frank Li
2024-10-25 22:31   ` Bjorn Helgaas
2024-10-28 16:38     ` Frank Li
2024-10-24 20:41 ` [PATCH v4 2/4] dt-bindings: PCI: fsl,imx6q-pcie-ep: Add compatible string fsl,imx8q-pcie-ep Frank Li
2024-10-24 20:41 ` [PATCH v4 3/4] PCI: imx6: Pass correct sub mode when calling phy_set_mode_ext() Frank Li
2024-10-24 20:41 ` [PATCH v4 4/4] PCI: imx6: Add i.MX8Q PCIe Endpoint (EP) support Frank Li
2024-10-25 22:32   ` Bjorn Helgaas
2024-10-25 20:48 ` [PATCH v4 0/4] PCI: ep: dwc/imx6: Add bus address support for PCI endpoint devices Bjorn Helgaas
2024-10-25 21:05   ` Frank Li
2024-10-25 21:36     ` Bjorn Helgaas [this message]
2024-10-26  3:08       ` Frank Li

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