From: "Krzysztof Wilczyński" <kw@linux.com>
To: Siddharth Vadapalli <s-vadapalli@ti.com>
Cc: bhelgaas@google.com, lpieralisi@kernel.org, robh@kernel.org,
vigneshr@ti.com, manivannan.sadhasivam@linaro.org,
kishon@kernel.org, thomas.richard@bootlin.com,
linux-omap@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, srk@ti.com
Subject: Re: [PATCH v2] PCI: j721e: Deassert PERST# after a delay of PCIE_T_PVPERL_MS ms
Date: Mon, 4 Nov 2024 22:22:21 +0900 [thread overview]
Message-ID: <20241104132221.GB2504924@rocinante> (raw)
In-Reply-To: <20241104074420.1862932-1-s-vadapalli@ti.com>
Hello,
> According to Section 2.2 of the PCI Express Card Electromechanical
> Specification (Revision 5.1), in order to ensure that the power and the
> reference clock are stable, PERST# has to be deasserted after a delay of
> 100 milliseconds (TPVPERL). Currently, it is being assumed that the power
> is already stable, which is not necessarily true. Hence, change the delay
> to PCIE_T_PVPERL_MS to guarantee that power and reference clock are stable.
Applied to controller/j721e, thank you!
[01/01] PCI: j721e: Deassert PERST# after a delay of PCIE_T_PVPERL_MS milliseconds
https://git.kernel.org/pci/pci/c/22a9120479a4
Krzysztof
prev parent reply other threads:[~2024-11-04 13:26 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-04 7:44 [PATCH v2] PCI: j721e: Deassert PERST# after a delay of PCIE_T_PVPERL_MS ms Siddharth Vadapalli
2024-11-04 13:22 ` Krzysztof Wilczyński [this message]
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