From: Conor Dooley <conor@kernel.org>
To: Matt Coster <matt.coster@imgtec.com>
Cc: Frank Binns <frank.binns@imgtec.com>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Nishanth Menon <nm@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, Randolph Sapp <rs@ti.com>,
Darren Etheridge <detheridge@ti.com>
Subject: Re: [PATCH 02/21] dt-bindings: gpu: img: Further constrain clocks
Date: Tue, 5 Nov 2024 18:16:36 +0000 [thread overview]
Message-ID: <20241105-blooper-unflawed-6181022944d9@spud> (raw)
In-Reply-To: <20241105-sets-bxs-4-64-patch-v1-v1-2-4ed30e865892@imgtec.com>
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On Tue, Nov 05, 2024 at 03:58:08PM +0000, Matt Coster wrote:
> All Imagination GPUs use three clocks: core, mem and sys. All reasonably
> modern Imagination GPUs also support a single-clock mode where the SoC
> only hooks up core and the other two are derived internally. On GPUs which
> support this mode, it is the default and most commonly used integration.
>
> Codify this "1 or 3" constraint in our bindings and hang the specifics off
> the vendor compatible string to mirror the integration-time choice.
>
> Signed-off-by: Matt Coster <matt.coster@imgtec.com>
> ---
> .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 27 +++++++++++++++-------
> 1 file changed, 19 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> index ef7070daf213277d0190fe319e202fdc597337d4..6924831d3e9dd9b2b052ca8f9d7228ff25526532 100644
> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> @@ -30,15 +30,20 @@ properties:
> maxItems: 1
>
> clocks:
> - minItems: 1
> - maxItems: 3
> + oneOf:
> + - minItems: 1
> + maxItems: 1
> + - minItems: 3
> + maxItems: 3
Just put the outer constraints here and...
> clock-names:
> - items:
> - - const: core
> - - const: mem
> - - const: sys
> - minItems: 1
> + oneOf:
> + - items:
> + - const: core
> + - items:
> + - const: core
> + - const: mem
> + - const: sys
>
> interrupts:
> maxItems: 1
> @@ -56,15 +61,21 @@ required:
> additionalProperties: false
>
> allOf:
> + # Vendor integrations using a single clock domain
> - if:
> properties:
> compatible:
> contains:
> - const: ti,am62-gpu
> + anyOf:
> + - const: ti,am62-gpu
> then:
> properties:
> clocks:
> + minItems: 1
> maxItems: 1
...adjust the constraints in conditional bits. Setting minItems to 1
should be a nop too. Pretty sure what you already had here was actually
already sufficient.
Cheers,
Conor.
> + clock-names:
> + items:
> + - const: core
>
> examples:
> - |
>
> --
> 2.47.0
>
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next prev parent reply other threads:[~2024-11-05 18:29 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-05 15:58 [PATCH 00/21] Imagination BXS-4-64 MC1 GPU support Matt Coster
2024-11-05 15:58 ` [PATCH 01/21] dt-bindings: gpu: img: More explicit compatible strings Matt Coster
2024-11-05 18:13 ` Conor Dooley
2024-11-06 10:17 ` Matt Coster
2024-11-06 16:57 ` Conor Dooley
2024-11-05 15:58 ` [PATCH 02/21] dt-bindings: gpu: img: Further constrain clocks Matt Coster
2024-11-05 18:16 ` Conor Dooley [this message]
2024-11-06 10:17 ` Matt Coster
2024-11-06 17:06 ` Conor Dooley
2024-11-05 15:58 ` [PATCH 03/21] dt-bindings: gpu: img: Power domain details Matt Coster
2024-11-05 18:05 ` Conor Dooley
2024-11-05 18:13 ` Conor Dooley
2024-11-06 10:18 ` Matt Coster
2024-11-06 18:28 ` Conor Dooley
2024-11-05 15:58 ` [PATCH 04/21] dt-bindings: gpu: img: Allow dma-coherent Matt Coster
2024-11-05 18:06 ` Conor Dooley
2024-11-06 10:18 ` Matt Coster
2024-11-06 18:30 ` Conor Dooley
2024-11-06 19:28 ` Andrew Davis
2024-11-05 15:58 ` [PATCH 05/21] drm/imagination: Use more specific compatible strings Matt Coster
2024-11-05 15:58 ` [PATCH 06/21] drm/imagination: Add power domain control Matt Coster
2024-11-05 15:58 ` [PATCH 07/21] arm64: dts: ti: k3-am62: New GPU binding details Matt Coster
2024-11-05 15:58 ` [PATCH 08/21] dt-bindings: gpu: img: Add BXS-4-64 devicetree bindings Matt Coster
2024-11-05 18:03 ` Conor Dooley
2024-11-06 10:18 ` Matt Coster
2024-11-06 18:33 ` Conor Dooley
2024-11-05 15:58 ` [PATCH 09/21] drm/imagination: Revert to non-threaded IRQs Matt Coster
2024-11-05 15:58 ` [PATCH 10/21] drm/imagination: Remove firmware enable_reg Matt Coster
2024-11-05 15:58 ` [PATCH 11/21] drm/imagination: Rename event_mask -> status_mask Matt Coster
2024-11-05 15:58 ` [PATCH 12/21] drm/imagination: Make has_fixed_data_addr a value Matt Coster
2024-11-05 15:58 ` [PATCH 13/21] drm/imagination: Use a lookup table for fw defs Matt Coster
2024-11-05 15:58 ` [PATCH 14/21] drm/imagination: Use callbacks for fw irq handling Matt Coster
2024-11-05 15:58 ` [PATCH 15/21] drm/imagination: Add register required for RISC-V firmware Matt Coster
2024-11-05 15:58 ` [PATCH 16/21] drm/imagination: Move ELF fw utils to common file Matt Coster
2024-11-05 15:58 ` [PATCH 17/21] drm/imagination: Add RISC-V firmware processor support Matt Coster
2024-11-05 15:58 ` [PATCH 18/21] drm/imagination: Add platform overrides infrastructure Matt Coster
2024-11-05 15:58 ` [PATCH 19/21] drm/imagination: Add device_memory_force_cpu_cached override Matt Coster
2024-11-05 15:58 ` [PATCH 20/21] drm/imagination: Add support for TI AM68 GPU Matt Coster
2024-11-05 15:58 ` [PATCH 21/21] arm64: dts: ti: k3-j721s2: Add GPU node Matt Coster
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