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Tue, 5 Nov 2024 02:50:12 -0500 (EST) Date: Tue, 5 Nov 2024 08:50:12 +0100 From: Janne Grunau To: Christophe JAILLET Cc: Janne Grunau via B4 Relay , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Hector Martin , Sven Peter , Alyssa Rosenzweig , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: Re: [PATCH v3 2/3] spi: apple: Add driver for Apple SPI controller Message-ID: <20241105075012.GC923511@robin.jannau.net> References: <20241101-asahi-spi-v3-0-3b411c5fb8e5@jannau.net> <20241101-asahi-spi-v3-2-3b411c5fb8e5@jannau.net> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241104_235015_154500_70638E9D X-CRM114-Status: GOOD ( 30.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Nov 04, 2024 at 08:16:25PM +0100, Christophe JAILLET wrote: > Le 01/11/2024 à 20:26, Janne Grunau via B4 Relay a écrit : > > From: Hector Martin > > > > This SPI controller is present in Apple SoCs such as the M1 (t8103) and > > M1 Pro/Max (t600x). It is a relatively straightforward design with two > > 16-entry FIFOs, arbitrary transfer sizes (up to 2**32 - 1) and fully > > configurable word size up to 32 bits. It supports one hardware CS line > > which can also be driven via the pinctrl/GPIO driver instead, if > > desired. TX and RX can be independently enabled. > > > > There are a surprising number of knobs for tweaking details of the > > transfer, most of which we do not use right now. Hardware CS control > > is available, but we haven't found a way to make it stay low across > > multiple logical transfers, so we just use software CS control for now. > > > > There is also a shared DMA offload coprocessor that can be used to handle > > larger transfers without requiring an IRQ every 8-16 words, but that > > feature depends on a bunch of scaffolding that isn't ready to be > > upstreamed yet, so leave it for later. > > > > The hardware shares some register bit definitions with spi-s3c24xx which > > suggests it has a shared legacy with Samsung SoCs, but it is too > > different to warrant sharing a driver. > > > > Signed-off-by: Hector Martin > > Signed-off-by: Janne Grunau > > --- > > Hi, > > > diff --git a/drivers/spi/spi-apple.c b/drivers/spi/spi-apple.c > > new file mode 100644 > > index 0000000000000000000000000000000000000000..1a3f61501db56d0d7689cc3d6f987bf636130cdb > > --- /dev/null > > +++ b/drivers/spi/spi-apple.c > > @@ -0,0 +1,531 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +// > > +// Apple SoC SPI device driver > > +// > > +// Copyright The Asahi Linux Contributors > > +// > > +// Based on spi-sifive.c, Copyright 2018 SiFive, Inc. > > + > > +#include > > +#include > > +#include > > +#include > > Move a few lines below to keep alphabetical order? done > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > ... > > > +static int apple_spi_probe(struct platform_device *pdev) > > +{ > > + struct apple_spi *spi; > > + int ret, irq; > > + struct spi_controller *ctlr; > > + > > + ctlr = devm_spi_alloc_master(&pdev->dev, sizeof(struct apple_spi)); > > + if (!ctlr) > > + return -ENOMEM; > > + > > + spi = spi_controller_get_devdata(ctlr); > > + init_completion(&spi->done); > > + platform_set_drvdata(pdev, ctlr); > > Is it needed? > There is no platform_get_drvdata() no, it is not used anymore. It's a leftover from v1 which used platform_get_drvdata() in apple_spi_remove() which is gone now. thanks, I'll send a v4 shortly Janne