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Fri, 22 Nov 2024 09:10:17 -0800 (PST) Received: from thinkpad ([49.207.202.49]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-724de531b82sm1911272b3a.102.2024.11.22.09.10.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 09:10:17 -0800 (PST) Date: Fri, 22 Nov 2024 22:40:10 +0530 From: Manivannan Sadhasivam To: Hongxing Zhu Cc: "l.stach@pengutronix.de" , "bhelgaas@google.com" , "lpieralisi@kernel.org" , "kw@linux.com" , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "shawnguo@kernel.org" , Frank Li , "s.hauer@pengutronix.de" , "festevam@gmail.com" , "imx@lists.linux.dev" , "kernel@pengutronix.de" , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v6 03/10] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Message-ID: <20241122171010.ze6iyxmgaq7g7yr6@thinkpad> References: <20241101070610.1267391-1-hongxing.zhu@nxp.com> <20241101070610.1267391-4-hongxing.zhu@nxp.com> <20241115064106.iwrorgimt6yenalx@thinkpad> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241122_091018_629457_EBADF776 X-CRM114-Status: GOOD ( 30.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Nov 18, 2024 at 02:59:35AM +0000, Hongxing Zhu wrote: > > -----Original Message----- > > From: Manivannan Sadhasivam > > Sent: 2024年11月15日 14:41 > > To: Hongxing Zhu > > Cc: l.stach@pengutronix.de; bhelgaas@google.com; lpieralisi@kernel.org; > > kw@linux.com; robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org; > > shawnguo@kernel.org; Frank Li ; > > s.hauer@pengutronix.de; festevam@gmail.com; imx@lists.linux.dev; > > kernel@pengutronix.de; linux-pci@vger.kernel.org; > > linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; > > linux-kernel@vger.kernel.org > > Subject: Re: [PATCH v6 03/10] PCI: imx6: Fetch dbi2 and iATU base addesses > > from DT > > > > On Fri, Nov 01, 2024 at 03:06:03PM +0800, Richard Zhu wrote: > > > Since dbi2 and atu regs are added for i.MX8M PCIes. Fetch the dbi2 and > > > iATU base addresses from DT directly, and remove the useless codes. > > > > > > > It'd be useful to mention where the base addresses were extraced. Like by > > the DWC common driver. > You're right. How about change them to the below one? > The dw_pcie_get_resources() function of DWC core codes can fetch the dbi2 and > iATU base addresses from DT directly, and remove the useless codes here. "Since dw_pcie_get_resources() gets the dbi2 and iATU base addresses from DT, remove the code from imx6 driver that does the same." - Mani > > > > > > Upsteam dts's have not enabled EP function. So no function broken for > > > old upsteam's dtb. > > > > > > Signed-off-by: Richard Zhu > > > > Reviewed-by: Manivannan Sadhasivam > > > > > > - Mani > > > > > --- > > > drivers/pci/controller/dwc/pci-imx6.c | 20 -------------------- > > > 1 file changed, 20 deletions(-) > > > > > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c > > > b/drivers/pci/controller/dwc/pci-imx6.c > > > index bc8567677a67..462decd1d589 100644 > > > --- a/drivers/pci/controller/dwc/pci-imx6.c > > > +++ b/drivers/pci/controller/dwc/pci-imx6.c > > > @@ -1115,7 +1115,6 @@ static int imx_add_pcie_ep(struct imx_pcie > > *imx_pcie, > > > struct platform_device *pdev) > > > { > > > int ret; > > > - unsigned int pcie_dbi2_offset; > > > struct dw_pcie_ep *ep; > > > struct dw_pcie *pci = imx_pcie->pci; > > > struct dw_pcie_rp *pp = &pci->pp; > > > @@ -1125,25 +1124,6 @@ static int imx_add_pcie_ep(struct imx_pcie > > *imx_pcie, > > > ep = &pci->ep; > > > ep->ops = &pcie_ep_ops; > > > > > > - switch (imx_pcie->drvdata->variant) { > > > - case IMX8MQ_EP: > > > - case IMX8MM_EP: > > > - case IMX8MP_EP: > > > - pcie_dbi2_offset = SZ_1M; > > > - break; > > > - default: > > > - pcie_dbi2_offset = SZ_4K; > > > - break; > > > - } > > > - > > > - pci->dbi_base2 = pci->dbi_base + pcie_dbi2_offset; > > > - > > > - /* > > > - * FIXME: Ideally, dbi2 base address should come from DT. But since only > > IMX95 is defining > > > - * "dbi2" in DT, "dbi_base2" is set to NULL here for that platform alone > > so that the DWC > > > - * core code can fetch that from DT. But once all platform DTs were fixed, > > this and the > > > - * above "dbi_base2" setting should be removed. > > > - */ > > > if (device_property_match_string(dev, "reg-names", "dbi2") >= 0) > > > pci->dbi_base2 = NULL; > > The check and the NULL assignment of "pci->dbi_base2" should be removed too > refer to FIXME listed above. Would updated in v7 later, Sorry about that. > > Best Regards > Richard Zhu > > > > > > -- > > > 2.37.1 > > > > > > > -- > > மணிவண்ணன் சதாசிவம் -- மணிவண்ணன் சதாசிவம்