[PATCH 0/3] sn65dsi83: Add LVDS_VCOM option in device-tree

[PATCH 0/3] sn65dsi83: Add LVDS_VCOM option in device-tree

[Andrej Picej]

Hi all,

This patch series depends on the patch
"[PATCH 11/15] arm64: dts: imx8mm-phyboard-polis: Add support for PEB-AV-10"
(https://lore.kernel.org/linux-arm-kernel/20241125081814.397352-12-andrej.picej@norik.com/)
which is currently under review. Please apply the dependent series first before
applying this one.

Best regards,
Andrej

Andrej Picej (1):
  arm64: dts: imx8mm-phyboard-polis-peb-av-10: Set custom lvds_vcom

Janine Hagemann (2):
  dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property
    ti,lvds-vcom
  drm/bridge: ti-sn65dsi83: Add ti,lvds-vcom as optional property

 .../bindings/display/bridge/ti,sn65dsi83.yaml      | 14 +++++++++++++-
 .../freescale/imx8mm-phyboard-polis-peb-av-10.dtso |  1 +
 drivers/gpu/drm/bridge/ti-sn65dsi83.c              | 10 +++++++++-
 3 files changed, 23 insertions(+), 2 deletions(-)

-- 
2.34.1

[PATCH 1/3] dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property ti,lvds-vcom

[Andrej Picej]

From: Janine Hagemann <j.hagemann@phytec.de>

Add an optional property to change LVDS output voltage. This depends on
the connected display specifications. With this property we directly set
the LVDS_VCOM (0x19) register.
Better register property mapping would be quite tricky. Please check
bridge's datasheet for details on how register values set the LVDS
data lines and LVDS clock output voltage.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Signed-off-by: Andrej Picej <andrej.picej@norik.com>
---
 .../bindings/display/bridge/ti,sn65dsi83.yaml      | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
index 48a97bb3e2e0..5b2c0c281824 100644
--- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
@@ -58,6 +58,12 @@ properties:
                   - const: 2
                   - const: 3
                   - const: 4
+              ti,lvds-vcom:
+                $ref: /schemas/types.yaml#/definitions/uint32
+                description: LVDS output voltage configuration. This defines
+                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
+                  details on how register values set the LVDS data lines and
+                  LVDS clock output voltage.
 
       port@1:
         $ref: /schemas/graph.yaml#/$defs/port-base
@@ -78,6 +84,12 @@ properties:
                   - const: 2
                   - const: 3
                   - const: 4
+              ti,lvds-vcom:
+                $ref: /schemas/types.yaml#/definitions/uint32
+                description: LVDS output voltage configuration. This defines
+                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
+                  details on how register values set the LVDS data lines and
+                  LVDS clock output voltage.
 
       port@2:
         $ref: /schemas/graph.yaml#/properties/port
@@ -120,7 +132,7 @@ allOf:
           properties:
             port@1: false
 
-additionalProperties: false
+additionalProperties: true
 
 examples:
   - |
-- 
2.34.1

[PATCH 2/3] drm/bridge: ti-sn65dsi83: Add ti,lvds-vcom as optional property

[Andrej Picej]

From: Janine Hagemann <j.hagemann@phytec.de>

Add a optional property to change LVDS output voltage. This should not
be static as this depends mainly on the connected display voltage
requirement.

If the property is not present, the default value of 0x05 is used.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Signed-off-by: Andrej Picej <andrej.picej@norik.com>
---
 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index 57a7ed13f996..d6824f6501b6 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -147,6 +147,7 @@ struct sn65dsi83 {
 	struct regulator		*vcc;
 	bool				lvds_dual_link;
 	bool				lvds_dual_link_even_odd_swap;
+	u32				lvds_vcom;
 };
 
 static const struct regmap_range sn65dsi83_readable_ranges[] = {
@@ -435,7 +436,7 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,
 		val |= REG_LVDS_FMT_LVDS_LINK_CFG;
 
 	regmap_write(ctx->regmap, REG_LVDS_FMT, val);
-	regmap_write(ctx->regmap, REG_LVDS_VCOM, 0x05);
+	regmap_write(ctx->regmap, REG_LVDS_VCOM, ctx->lvds_vcom);
 	regmap_write(ctx->regmap, REG_LVDS_LANE,
 		     (ctx->lvds_dual_link_even_odd_swap ?
 		      REG_LVDS_LANE_EVEN_ODD_SWAP : 0) |
@@ -580,6 +581,13 @@ static int sn65dsi83_parse_dt(struct sn65dsi83 *ctx, enum sn65dsi83_model model)
 {
 	struct drm_bridge *panel_bridge;
 	struct device *dev = ctx->dev;
+	struct device_node *endpoint;
+
+	ctx->lvds_vcom = 0x05;
+
+	endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 0, 0);
+	of_property_read_u32(endpoint, "ti,lvds-vcom", &ctx->lvds_vcom);
+	of_node_put(endpoint);
 
 	ctx->lvds_dual_link = false;
 	ctx->lvds_dual_link_even_odd_swap = false;
-- 
2.34.1

[PATCH 3/3] arm64: dts: imx8mm-phyboard-polis-peb-av-10: Set custom lvds_vcom

[Andrej Picej]

Set custom differential output voltage for LVDS, to fulfill requirements
of the connected display. LVDS diferential voltage for data-lanes and
clock output has to be between 200 mV and 600 mV.
Driver sets 200 Ohm near-end termination by default and since
LVDS_VCOM_CHA_LVDS_VOD_SWING (0x19) [3:2] sets both data-lane and clock
output voltage we have to set the register to the value of 0x0C (0b11 <<
2):
- Steady-state differential output voltage for LVDS data-lanes:
  min: 300 mV, typ: 402 mV, max: 511 mV
- Steady-state differential output voltage for LVDS clock lane:
  min: 234 mV, typ: 314 mV, max: 399 mV

Signed-off-by: Andrej Picej <andrej.picej@norik.com>
---
 .../boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso      | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso
index a9de42cf14be..709b555ca753 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso
@@ -179,6 +179,7 @@ port@0 {
 			bridge_in: endpoint {
 				remote-endpoint = <&dsi_out>;
 				data-lanes = <1 2 3 4>;
+				ti,lvds-vcom = <0x0C>;
 			};
 		};
 
-- 
2.34.1

Re: [PATCH 1/3] dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property ti,lvds-vcom

[Rob Herring]

On Wed, Nov 27, 2024 at 11:30:29AM +0100, Andrej Picej wrote:
> From: Janine Hagemann <j.hagemann@phytec.de>
> 
> Add an optional property to change LVDS output voltage. This depends on
> the connected display specifications. With this property we directly set
> the LVDS_VCOM (0x19) register.
> Better register property mapping would be quite tricky. Please check
> bridge's datasheet for details on how register values set the LVDS
> data lines and LVDS clock output voltage.
> 
> Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
> Signed-off-by: Andrej Picej <andrej.picej@norik.com>
> ---
>  .../bindings/display/bridge/ti,sn65dsi83.yaml      | 14 +++++++++++++-
>  1 file changed, 13 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> index 48a97bb3e2e0..5b2c0c281824 100644
> --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> @@ -58,6 +58,12 @@ properties:
>                    - const: 2
>                    - const: 3
>                    - const: 4
> +              ti,lvds-vcom:
> +                $ref: /schemas/types.yaml#/definitions/uint32
> +                description: LVDS output voltage configuration. This defines
> +                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
> +                  details on how register values set the LVDS data lines and
> +                  LVDS clock output voltage.

Constraints? 0 - 2^32 are all valid values?

>  
>        port@1:
>          $ref: /schemas/graph.yaml#/$defs/port-base
> @@ -78,6 +84,12 @@ properties:
>                    - const: 2
>                    - const: 3
>                    - const: 4
> +              ti,lvds-vcom:
> +                $ref: /schemas/types.yaml#/definitions/uint32
> +                description: LVDS output voltage configuration. This defines
> +                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
> +                  details on how register values set the LVDS data lines and
> +                  LVDS clock output voltage.

Never good to just have 2 copies of the same thing. Move the whole port 
schema to a $defs entry and add the property there. Then just $ref it:

  port@0:
    description: Video port for MIPI DSI Channel-A input
    $ref: '#/$defs/dsi-port'


$defs:
  dsi-port:
    $ref: /schemas/graph.yaml#/$defs/port-base
    unevaluatedProperties: false
    description: Video port for MIPI DSI inputs

    properties:
      endpoint:
        $ref: /schemas/media/video-interfaces.yaml#
        unevaluatedProperties: false

        properties:
          data-lanes:
            description: array of physical DSI data lane indexes.
            minItems: 1
            items:
              - const: 1
              - const: 2
              - const: 3
              - const: 4

Re: [PATCH 1/3] dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property ti,lvds-vcom

[Andrej Picej]

Hi Rob,

On 27. 11. 24 16:16, Rob Herring wrote:
> On Wed, Nov 27, 2024 at 11:30:29AM +0100, Andrej Picej wrote:
>> From: Janine Hagemann <j.hagemann@phytec.de>
>>
>> Add an optional property to change LVDS output voltage. This depends on
>> the connected display specifications. With this property we directly set
>> the LVDS_VCOM (0x19) register.
>> Better register property mapping would be quite tricky. Please check
>> bridge's datasheet for details on how register values set the LVDS
>> data lines and LVDS clock output voltage.
>>
>> Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
>> Signed-off-by: Andrej Picej <andrej.picej@norik.com>
>> ---
>>   .../bindings/display/bridge/ti,sn65dsi83.yaml      | 14 +++++++++++++-
>>   1 file changed, 13 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
>> index 48a97bb3e2e0..5b2c0c281824 100644
>> --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
>> +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
>> @@ -58,6 +58,12 @@ properties:
>>                     - const: 2
>>                     - const: 3
>>                     - const: 4
>> +              ti,lvds-vcom:
>> +                $ref: /schemas/types.yaml#/definitions/uint32
>> +                description: LVDS output voltage configuration. This defines
>> +                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
>> +                  details on how register values set the LVDS data lines and
>> +                  LVDS clock output voltage.
> 
> Constraints? 0 - 2^32 are all valid values?

Not really, only first 6 bits, which also means that this can be uint8 
then. Will fix with other issues.

> 
>>   
>>         port@1:
>>           $ref: /schemas/graph.yaml#/$defs/port-base
>> @@ -78,6 +84,12 @@ properties:
>>                     - const: 2
>>                     - const: 3
>>                     - const: 4
>> +              ti,lvds-vcom:
>> +                $ref: /schemas/types.yaml#/definitions/uint32
>> +                description: LVDS output voltage configuration. This defines
>> +                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
>> +                  details on how register values set the LVDS data lines and
>> +                  LVDS clock output voltage.
> 
> Never good to just have 2 copies of the same thing. Move the whole port
> schema to a $defs entry and add the property there. Then just $ref it:
> 
>    port@0:
>      description: Video port for MIPI DSI Channel-A input
>      $ref: '#/$defs/dsi-port'
> 
> 
> $defs:
>    dsi-port:
>      $ref: /schemas/graph.yaml#/$defs/port-base
>      unevaluatedProperties: false
>      description: Video port for MIPI DSI inputs
> 
>      properties:
>        endpoint:
>          $ref: /schemas/media/video-interfaces.yaml#
>          unevaluatedProperties: false
> 
>          properties:
>            data-lanes:
>              description: array of physical DSI data lane indexes.
>              minItems: 1
>              items:
>                - const: 1
>                - const: 2
>                - const: 3
>                - const: 4
> 

Ok will do it like this + just noticed that we are adding this under 
MIPI DSI port, and not LVDS output port for which these property is 
meant for. Will move it there.

Thanks. Best regards,
Andrej

Re: [PATCH 1/3] dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property ti,lvds-vcom

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 2178 bytes --]

On Thu, Nov 28, 2024 at 09:46:33AM +0100, Andrej Picej wrote:
> On 27. 11. 24 16:16, Rob Herring wrote:
> > On Wed, Nov 27, 2024 at 11:30:29AM +0100, Andrej Picej wrote:
> > > From: Janine Hagemann <j.hagemann@phytec.de>
> > > 
> > > Add an optional property to change LVDS output voltage. This depends on
> > > the connected display specifications. With this property we directly set
> > > the LVDS_VCOM (0x19) register.
> > > Better register property mapping would be quite tricky. Please check
> > > bridge's datasheet for details on how register values set the LVDS
> > > data lines and LVDS clock output voltage.
> > > 
> > > Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
> > > Signed-off-by: Andrej Picej <andrej.picej@norik.com>
> > > ---
> > >   .../bindings/display/bridge/ti,sn65dsi83.yaml      | 14 +++++++++++++-
> > >   1 file changed, 13 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> > > index 48a97bb3e2e0..5b2c0c281824 100644
> > > --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> > > +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> > > @@ -58,6 +58,12 @@ properties:
> > >                     - const: 2
> > >                     - const: 3
> > >                     - const: 4
> > > +              ti,lvds-vcom:
> > > +                $ref: /schemas/types.yaml#/definitions/uint32
> > > +                description: LVDS output voltage configuration. This defines
> > > +                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
> > > +                  details on how register values set the LVDS data lines and
> > > +                  LVDS clock output voltage.
> > 
> > Constraints? 0 - 2^32 are all valid values?
> 
> Not really, only first 6 bits, which also means that this can be uint8 then.
> Will fix with other issues.

Also, generally speaking directly using register values is really
frowned upon, even more so when they match a value expressed in a
standard unit.

Maxime

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Re: [PATCH 1/3] dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property ti,lvds-vcom

[Andrej Picej]

Hi Maxime,

On 28. 11. 24 11:29, Maxime Ripard wrote:
> On Thu, Nov 28, 2024 at 09:46:33AM +0100, Andrej Picej wrote:
>> On 27. 11. 24 16:16, Rob Herring wrote:
>>> On Wed, Nov 27, 2024 at 11:30:29AM +0100, Andrej Picej wrote:
>>>> From: Janine Hagemann <j.hagemann@phytec.de>
>>>>
>>>> Add an optional property to change LVDS output voltage. This depends on
>>>> the connected display specifications. With this property we directly set
>>>> the LVDS_VCOM (0x19) register.
>>>> Better register property mapping would be quite tricky. Please check
>>>> bridge's datasheet for details on how register values set the LVDS
>>>> data lines and LVDS clock output voltage.
>>>>
>>>> Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
>>>> Signed-off-by: Andrej Picej <andrej.picej@norik.com>
>>>> ---
>>>>    .../bindings/display/bridge/ti,sn65dsi83.yaml      | 14 +++++++++++++-
>>>>    1 file changed, 13 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
>>>> index 48a97bb3e2e0..5b2c0c281824 100644
>>>> --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
>>>> +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
>>>> @@ -58,6 +58,12 @@ properties:
>>>>                      - const: 2
>>>>                      - const: 3
>>>>                      - const: 4
>>>> +              ti,lvds-vcom:
>>>> +                $ref: /schemas/types.yaml#/definitions/uint32
>>>> +                description: LVDS output voltage configuration. This defines
>>>> +                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
>>>> +                  details on how register values set the LVDS data lines and
>>>> +                  LVDS clock output voltage.
>>>
>>> Constraints? 0 - 2^32 are all valid values?
>>
>> Not really, only first 6 bits, which also means that this can be uint8 then.
>> Will fix with other issues.
> 
> Also, generally speaking directly using register values is really
> frowned upon, even more so when they match a value expressed in a
> standard unit.

Yes, I am aware that this is not how devide-tree/device drivers should 
work. But setting this values based on wanted LVDS voltage will be quite 
tricky. Matching a value expressed in mV would be quite hard, take a 
look in the bridge datasheet [1], Chapter 6.5 Electrical Characteristics 
(|VOD|). Basically both:
- LVDS data line output and
- LVDS clock voltage
is determined by the CSR 0x19.3:2. So when checking which Reg setting 
CSR 0x19 should be set to both conditions should meet specifications of 
the connected display. Output voltage for the same CSR 0x19 setting 
differs between LVDS data lines and LVDS clock.

Anyway, I'll prepare a v2 which only sets a part of this register, a 
bitfield (2 bits) that is responsible for LVDS differential output voltage.

[1] 
https://www.ti.com/lit/ds/symlink/sn65dsi83.pdf?ts=1732738773429&ref_url=https%253A%252F%252Fwww.mouser.co.uk%252F

Best regards,
Andrej

> 
> Maxime

Re: [PATCH 0/3] sn65dsi83: Add LVDS_VCOM option in device-tree

[Andrej Picej]

Forgot to CC PHYTEC upstream mailing list. Doing this now.

On 27. 11. 24 11:30, Andrej Picej wrote:
> Hi all,
>
> This patch series depends on the patch
> "[PATCH 11/15] arm64: dts: imx8mm-phyboard-polis: Add support for PEB-AV-10"
> (https://lore.kernel.org/linux-arm-kernel/20241125081814.397352-12-andrej.picej@norik.com/)
> which is currently under review. Please apply the dependent series first before
> applying this one.
>
> Best regards,
> Andrej
>
> Andrej Picej (1):
>    arm64: dts: imx8mm-phyboard-polis-peb-av-10: Set custom lvds_vcom
>
> Janine Hagemann (2):
>    dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property
>      ti,lvds-vcom
>    drm/bridge: ti-sn65dsi83: Add ti,lvds-vcom as optional property
>
>   .../bindings/display/bridge/ti,sn65dsi83.yaml      | 14 +++++++++++++-
>   .../freescale/imx8mm-phyboard-polis-peb-av-10.dtso |  1 +
>   drivers/gpu/drm/bridge/ti-sn65dsi83.c              | 10 +++++++++-
>   3 files changed, 23 insertions(+), 2 deletions(-)
>

Re: [PATCH 1/3] dt-bindings: drm/bridge: ti-sn65dsi83: Add optional property ti,lvds-vcom

[Dmitry Baryshkov]

On Thu, Nov 28, 2024 at 11:57:16AM +0100, Andrej Picej wrote:
> Hi Maxime,
> 
> On 28. 11. 24 11:29, Maxime Ripard wrote:
> > On Thu, Nov 28, 2024 at 09:46:33AM +0100, Andrej Picej wrote:
> > > On 27. 11. 24 16:16, Rob Herring wrote:
> > > > On Wed, Nov 27, 2024 at 11:30:29AM +0100, Andrej Picej wrote:
> > > > > From: Janine Hagemann <j.hagemann@phytec.de>
> > > > > 
> > > > > Add an optional property to change LVDS output voltage. This depends on
> > > > > the connected display specifications. With this property we directly set
> > > > > the LVDS_VCOM (0x19) register.
> > > > > Better register property mapping would be quite tricky. Please check
> > > > > bridge's datasheet for details on how register values set the LVDS
> > > > > data lines and LVDS clock output voltage.
> > > > > 
> > > > > Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
> > > > > Signed-off-by: Andrej Picej <andrej.picej@norik.com>
> > > > > ---
> > > > >    .../bindings/display/bridge/ti,sn65dsi83.yaml      | 14 +++++++++++++-
> > > > >    1 file changed, 13 insertions(+), 1 deletion(-)
> > > > > 
> > > > > diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> > > > > index 48a97bb3e2e0..5b2c0c281824 100644
> > > > > --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> > > > > +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> > > > > @@ -58,6 +58,12 @@ properties:
> > > > >                      - const: 2
> > > > >                      - const: 3
> > > > >                      - const: 4
> > > > > +              ti,lvds-vcom:
> > > > > +                $ref: /schemas/types.yaml#/definitions/uint32
> > > > > +                description: LVDS output voltage configuration. This defines
> > > > > +                  LVDS_VCOM (0x19) register value. Check bridge's datasheet for
> > > > > +                  details on how register values set the LVDS data lines and
> > > > > +                  LVDS clock output voltage.
> > > > 
> > > > Constraints? 0 - 2^32 are all valid values?
> > > 
> > > Not really, only first 6 bits, which also means that this can be uint8 then.
> > > Will fix with other issues.
> > 
> > Also, generally speaking directly using register values is really
> > frowned upon, even more so when they match a value expressed in a
> > standard unit.
> 
> Yes, I am aware that this is not how devide-tree/device drivers should work.
> But setting this values based on wanted LVDS voltage will be quite tricky.
> Matching a value expressed in mV would be quite hard, take a look in the
> bridge datasheet [1], Chapter 6.5 Electrical Characteristics (|VOD|).
> Basically both:
> - LVDS data line output and
> - LVDS clock voltage
> is determined by the CSR 0x19.3:2. So when checking which Reg setting CSR
> 0x19 should be set to both conditions should meet specifications of the
> connected display. Output voltage for the same CSR 0x19 setting differs
> between LVDS data lines and LVDS clock.
> 
> Anyway, I'll prepare a v2 which only sets a part of this register, a
> bitfield (2 bits) that is responsible for LVDS differential output voltage.

Please use mV to specify the value in device tree. Yes, it's not easy.
Yes, it is still recommended for multiple reasons.

> 
> [1] https://www.ti.com/lit/ds/symlink/sn65dsi83.pdf?ts=1732738773429&ref_url=https%253A%252F%252Fwww.mouser.co.uk%252F
> 
> Best regards,
> Andrej
> 
> > 
> > Maxime

-- 
With best wishes
Dmitry