[PATCH 0/2] perf/dwc_pcie: Fix the swapped event numbers as well as the documentation

[PATCH 0/2] perf/dwc_pcie: Fix the swapped event numbers as well as the documentation

[Ilkka Koskinen]

According to the versions of Designware Cores PCI Express Controller Databook
I found, the eventid for "L1 aux" is 0x08 and "TX L0s and RX L0S" is 0x09.

Shuai and Jing, could you verify that your document matches ours and the events
are indeed swapped in the driver at the moment?

Cheers, Ilkka



Ilkka Koskinen (2):
  perf/dwc_pcie: Fix the event numbers
  Documentation: dwc_pcie_pmu: Fix the mnemonics and eventid

 Documentation/admin-guide/perf/dwc_pcie_pmu.rst | 6 +++---
 drivers/perf/dwc_pcie_pmu.c                     | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

-- 
2.47.0

[PATCH 1/2] perf/dwc_pcie: Fix the event numbers

[Ilkka Koskinen]

According to Databook, L1 aux is event number 0x08 and
TX L0s and RX L0S is 0x09. Fix the event numbers for the
two events.

Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
---
 drivers/perf/dwc_pcie_pmu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/perf/dwc_pcie_pmu.c b/drivers/perf/dwc_pcie_pmu.c
index 9cbea9675e21..890cf3bb43a2 100644
--- a/drivers/perf/dwc_pcie_pmu.c
+++ b/drivers/perf/dwc_pcie_pmu.c
@@ -199,8 +199,8 @@ static struct attribute *dwc_pcie_pmu_time_event_attrs[] = {
 	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_1, 0x05),
 	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_2, 0x06),
 	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(CFG_RCVRY, 0x07),
-	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(TX_RX_L0S, 0x08),
-	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_AUX, 0x09),
+	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_AUX, 0x08),
+	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(TX_RX_L0S, 0x09),
 
 	/* Group #1 */
 	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(tx_pcie_tlp_data_payload, 0x20),
-- 
2.47.0

[PATCH 2/2] Documentation: dwc_pcie_pmu: Fix the mnemonics and eventid

[Ilkka Koskinen]

Fix the event id and type in the example. In addition, the recent fix,
which addressed the mnemonics with mixed case, didn't fix the document.
Match the names with the driver.

Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
---
 Documentation/admin-guide/perf/dwc_pcie_pmu.rst | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
index 39b8e1fdd0cd..cb376f335f40 100644
--- a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
+++ b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
@@ -60,7 +60,7 @@ description of available events and configuration options in sysfs, see
 The "format" directory describes format of the config fields of the
 perf_event_attr structure. The "events" directory provides configuration
 templates for all documented events.  For example,
-"Rx_PCIe_TLP_Data_Payload" is an equivalent of "eventid=0x22,type=0x1".
+"rx_pcie_tlp_data_payload" is an equivalent of "eventid=0x21,type=0x0".
 
 The "perf list" command shall list the available events from sysfs, e.g.::
 
@@ -79,8 +79,8 @@ Example usage of counting PCIe RX TLP data payload (Units of bytes)::
 
 The average RX/TX bandwidth can be calculated using the following formula:
 
-    PCIe RX Bandwidth = Rx_PCIe_TLP_Data_Payload / Measure_Time_Window
-    PCIe TX Bandwidth = Tx_PCIe_TLP_Data_Payload / Measure_Time_Window
+    PCIe RX Bandwidth = rx_pcie_tlp_data_payload / Measure_Time_Window
+    PCIe TX Bandwidth = tx_pcie_tlp_data_payload / Measure_Time_Window
 
 Lane Event Usage
 -------------------------------
-- 
2.47.0

Re: [PATCH 0/2] perf/dwc_pcie: Fix the swapped event numbers as well as the documentation

[Shuai Xue]

在 2024/12/5 14:19, Ilkka Koskinen 写道:
> According to the versions of Designware Cores PCI Express Controller Databook
> I found, the eventid for "L1 aux" is 0x08 and "TX L0s and RX L0S" is 0x09.
> 
> Shuai and Jing, could you verify that your document matches ours and the events
> are indeed swapped in the driver at the moment?

Yep, it is a typo.

> 
> Cheers, Ilkka

Thanks for the fixes :)

Best Regards,
Shuai

> 
> 
> 
> Ilkka Koskinen (2):
>    perf/dwc_pcie: Fix the event numbers
>    Documentation: dwc_pcie_pmu: Fix the mnemonics and eventid
> 
>   Documentation/admin-guide/perf/dwc_pcie_pmu.rst | 6 +++---
>   drivers/perf/dwc_pcie_pmu.c                     | 4 ++--
>   2 files changed, 5 insertions(+), 5 deletions(-)
> 

Re: [PATCH 1/2] perf/dwc_pcie: Fix the event numbers

[Shuai Xue]

在 2024/12/5 14:19, Ilkka Koskinen 写道:
> According to Databook, L1 aux is event number 0x08 and
> TX L0s and RX L0S is 0x09. Fix the event numbers for the
> two events.
> 
> Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
> ---
>   drivers/perf/dwc_pcie_pmu.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/perf/dwc_pcie_pmu.c b/drivers/perf/dwc_pcie_pmu.c
> index 9cbea9675e21..890cf3bb43a2 100644
> --- a/drivers/perf/dwc_pcie_pmu.c
> +++ b/drivers/perf/dwc_pcie_pmu.c
> @@ -199,8 +199,8 @@ static struct attribute *dwc_pcie_pmu_time_event_attrs[] = {
>   	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_1, 0x05),
>   	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_2, 0x06),
>   	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(CFG_RCVRY, 0x07),
> -	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(TX_RX_L0S, 0x08),
> -	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_AUX, 0x09),
> +	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(L1_AUX, 0x08),
> +	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(TX_RX_L0S, 0x09),
>   
>   	/* Group #1 */
>   	DWC_PCIE_PMU_TIME_BASE_EVENT_ATTR(tx_pcie_tlp_data_payload, 0x20),

LGTM.

Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>

Thanks.

Best Regards,
Shuai

Re: [PATCH 2/2] Documentation: dwc_pcie_pmu: Fix the mnemonics and eventid

[Shuai Xue]

在 2024/12/5 14:19, Ilkka Koskinen 写道:
> Fix the event id and type in the example. In addition, the recent fix,
> which addressed the mnemonics with mixed case, didn't fix the document.
> Match the names with the driver.
> 
> Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
> ---
>   Documentation/admin-guide/perf/dwc_pcie_pmu.rst | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
> index 39b8e1fdd0cd..cb376f335f40 100644
> --- a/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
> +++ b/Documentation/admin-guide/perf/dwc_pcie_pmu.rst
> @@ -60,7 +60,7 @@ description of available events and configuration options in sysfs, see
>   The "format" directory describes format of the config fields of the
>   perf_event_attr structure. The "events" directory provides configuration
>   templates for all documented events.  For example,
> -"Rx_PCIe_TLP_Data_Payload" is an equivalent of "eventid=0x22,type=0x1".
> +"rx_pcie_tlp_data_payload" is an equivalent of "eventid=0x21,type=0x0".
>   
>   The "perf list" command shall list the available events from sysfs, e.g.::
>   
> @@ -79,8 +79,8 @@ Example usage of counting PCIe RX TLP data payload (Units of bytes)::
>   
>   The average RX/TX bandwidth can be calculated using the following formula:
>   
> -    PCIe RX Bandwidth = Rx_PCIe_TLP_Data_Payload / Measure_Time_Window
> -    PCIe TX Bandwidth = Tx_PCIe_TLP_Data_Payload / Measure_Time_Window
> +    PCIe RX Bandwidth = rx_pcie_tlp_data_payload / Measure_Time_Window
> +    PCIe TX Bandwidth = tx_pcie_tlp_data_payload / Measure_Time_Window
>   
>   Lane Event Usage
>   -------------------------------


LGTM.

Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com>

Thanks.

Best Regards,
Shuai

Re: [PATCH 0/2] perf/dwc_pcie: Fix the swapped event numbers as well as the documentation

[Will Deacon]

On Thu, 05 Dec 2024 06:19:12 +0000, Ilkka Koskinen wrote:
> According to the versions of Designware Cores PCI Express Controller Databook
> I found, the eventid for "L1 aux" is 0x08 and "TX L0s and RX L0S" is 0x09.
> 
> Shuai and Jing, could you verify that your document matches ours and the events
> are indeed swapped in the driver at the moment?
> 
> Cheers, Ilkka
> 
> [...]

Applied to will (for-next/perf), thanks!

[1/2] perf/dwc_pcie: Fix the event numbers
      https://git.kernel.org/will/c/e64c22cc2e61
[2/2] Documentation: dwc_pcie_pmu: Fix the mnemonics and eventid
      https://git.kernel.org/will/c/8632306e093c

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev