* [PATCH v2 2/2] clk: rockchip: use PCLK_CIF0/1 clock IDs on RK3066
2024-12-05 18:29 [PATCH v2 1/2] dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1 Val Packett
@ 2024-12-05 18:29 ` Val Packett
2024-12-06 17:08 ` [PATCH v2 1/2] dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1 Conor Dooley
2025-02-10 11:02 ` Heiko Stuebner
2 siblings, 0 replies; 4+ messages in thread
From: Val Packett @ 2024-12-05 18:29 UTC (permalink / raw)
Cc: Val Packett, Michael Turquette, Stephen Boyd, Heiko Stuebner,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-clk,
linux-arm-kernel, linux-rockchip, linux-kernel, devicetree
RK3066 has two "CIF" video capture interface blocks, reference the
newly added IDs for their PCLK clocks.
Signed-off-by: Val Packett <val@packett.cool>
---
drivers/clk/rockchip/clk-rk3188.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index 684233e72105..81e94b338d0f 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -344,7 +344,7 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = {
GATE(0, "pclkin_cif0", "ext_cif0", 0,
RK2928_CLKGATE_CON(3), 3, GFLAGS),
- INVERTER(0, "pclk_cif0", "pclkin_cif0",
+ INVERTER(PCLK_CIF0, "pclk_cif0", "pclkin_cif0",
RK2928_CLKSEL_CON(30), 8, IFLAGS),
FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
@@ -602,7 +602,7 @@ static struct rockchip_clk_branch rk3066a_clk_branches[] __initdata = {
GATE(0, "pclkin_cif1", "ext_cif1", 0,
RK2928_CLKGATE_CON(3), 4, GFLAGS),
- INVERTER(0, "pclk_cif1", "pclkin_cif1",
+ INVERTER(PCLK_CIF1, "pclk_cif1", "pclkin_cif1",
RK2928_CLKSEL_CON(30), 12, IFLAGS),
COMPOSITE(0, "aclk_gpu_src", mux_pll_src_cpll_gpll_p, 0,
--
2.47.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH v2 1/2] dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1
2024-12-05 18:29 [PATCH v2 1/2] dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1 Val Packett
2024-12-05 18:29 ` [PATCH v2 2/2] clk: rockchip: use PCLK_CIF0/1 clock IDs on RK3066 Val Packett
@ 2024-12-06 17:08 ` Conor Dooley
2025-02-10 11:02 ` Heiko Stuebner
2 siblings, 0 replies; 4+ messages in thread
From: Conor Dooley @ 2024-12-06 17:08 UTC (permalink / raw)
To: Val Packett
Cc: Michael Turquette, Stephen Boyd, Heiko Stuebner, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-clk, linux-arm-kernel,
linux-rockchip, linux-kernel, devicetree
[-- Attachment #1: Type: text/plain, Size: 258 bytes --]
On Thu, Dec 05, 2024 at 03:29:35PM -0300, Val Packett wrote:
> Add missing clock IDs for the CIF (Camera InterFace) blocks
> on the RK3188/RK3066.
>
> Signed-off-by: Val Packett <val@packett.cool>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1
2024-12-05 18:29 [PATCH v2 1/2] dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1 Val Packett
2024-12-05 18:29 ` [PATCH v2 2/2] clk: rockchip: use PCLK_CIF0/1 clock IDs on RK3066 Val Packett
2024-12-06 17:08 ` [PATCH v2 1/2] dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1 Conor Dooley
@ 2025-02-10 11:02 ` Heiko Stuebner
2 siblings, 0 replies; 4+ messages in thread
From: Heiko Stuebner @ 2025-02-10 11:02 UTC (permalink / raw)
To: Val Packett
Cc: Heiko Stuebner, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-clk, linux-arm-kernel,
linux-rockchip, linux-kernel, devicetree
On Thu, 05 Dec 2024 15:29:35 -0300, Val Packett wrote:
> Add missing clock IDs for the CIF (Camera InterFace) blocks
> on the RK3188/RK3066.
>
>
Applied, thanks!
[1/2] dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1
commit: 7c9804031626c51d4ddbc8c6e82bbd8496cf6e56
[2/2] clk: rockchip: use PCLK_CIF0/1 clock IDs on RK3066
commit: 4a918309d53f800dd07b94c4a4b1fcdb6289eca5
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 4+ messages in thread