[PATCH v2 0/2] i2c: exynos5: Add support for Exynos8895 SoC

[PATCH v2 0/2] i2c: exynos5: Add support for Exynos8895 SoC

[Ivaylo Ivanov]

Hey folks,

This series adds HSI2C support for Exynos8895 to i2c-exynos5. HSI2C
buses here are mostly available implemented in USIv1 blocks, with 5
available externally - hsi2c_0 to 4. hsi2c_0 is available for PMIC
(although I've never seen it used) and it uses BUSC clocks, which are
still not implemented in the current clock driver, so I've decided to
leave it out for now.

In the next few patchsets support for USIv1 will be added to the
exynos-usi driver and with that the rest of the I2C buses will be made
available in the device tree.

Kind regards,
Ivo

Changes in v2:
 - Dropped nested-if in the binding, keeping in mind we'll always
   provide only a single clock.

Ivaylo Ivanov (2):
  dt-bindings: i2c: exynos5: Add samsung,exynos8895-hsi2c compatible
  i2c: exynos5: Add support for Exynos8895 SoC

 .../devicetree/bindings/i2c/i2c-exynos5.yaml  |  1 +
 drivers/i2c/busses/i2c-exynos5.c              | 31 +++++++++++++++++--
 2 files changed, 30 insertions(+), 2 deletions(-)

-- 
2.43.0

[PATCH v2 1/2] dt-bindings: i2c: exynos5: Add samsung,exynos8895-hsi2c compatible

[Ivaylo Ivanov]

Add samsung,exynos8895-hsi2c dedicated compatible for representing
I2C of Exynos8895 SoC. I2C buses may be implemented both as a part
of USIv1 and separately.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
---
 Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
index cc8bba553..70cc2ee9e 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
@@ -25,6 +25,7 @@ properties:
           - samsung,exynos5250-hsi2c    # Exynos5250 and Exynos5420
           - samsung,exynos5260-hsi2c    # Exynos5260
           - samsung,exynos7-hsi2c       # Exynos7
+          - samsung,exynos8895-hsi2c
           - samsung,exynosautov9-hsi2c
       - items:
           - enum:
-- 
2.43.0

[PATCH v2 2/2] i2c: exynos5: Add support for Exynos8895 SoC

[Ivaylo Ivanov]

Exynos8895 functioning logic mostly follows I2C_TYPE_EXYNOS7, but timing
and temp calculations are slightly changed according to the following
logic:

FPCLK / FI2C = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 2 *
((FLT_CYCLE + 3) - (FLT_CYCLE + 3) % (CLK_DIV + 1))

temp := (FPCLK / FI2C) - (FLT_CYCLE + 3) * 2

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
---
 drivers/i2c/busses/i2c-exynos5.c | 31 +++++++++++++++++++++++++++++--
 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
index e33001508..8d8ee42ba 100644
--- a/drivers/i2c/busses/i2c-exynos5.c
+++ b/drivers/i2c/busses/i2c-exynos5.c
@@ -168,6 +168,7 @@ enum i2c_type_exynos {
 	I2C_TYPE_EXYNOS5,
 	I2C_TYPE_EXYNOS7,
 	I2C_TYPE_EXYNOSAUTOV9,
+	I2C_TYPE_EXYNOS8895,
 };
 
 struct exynos5_i2c {
@@ -240,6 +241,11 @@ static const struct exynos_hsi2c_variant exynosautov9_hsi2c_data = {
 	.hw		= I2C_TYPE_EXYNOSAUTOV9,
 };
 
+static const struct exynos_hsi2c_variant exynos8895_hsi2c_data = {
+	.fifo_depth	= 64,
+	.hw		= I2C_TYPE_EXYNOS8895,
+};
+
 static const struct of_device_id exynos5_i2c_match[] = {
 	{
 		.compatible = "samsung,exynos5-hsi2c",
@@ -256,6 +262,9 @@ static const struct of_device_id exynos5_i2c_match[] = {
 	}, {
 		.compatible = "samsung,exynosautov9-hsi2c",
 		.data = &exynosautov9_hsi2c_data
+	}, {
+		.compatible = "samsung,exynos8895-hsi2c",
+		.data = &exynos8895_hsi2c_data
 	}, {},
 };
 MODULE_DEVICE_TABLE(of, exynos5_i2c_match);
@@ -331,6 +340,14 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings)
 	 * clk_cycle := TSCLK_L + TSCLK_H
 	 * temp := (CLK_DIV + 1) * (clk_cycle + 2)
 	 *
+	 * In case of HSI2C controllers in Exynos8895
+	 * FPCLK / FI2C =
+	 * (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) +
+	 * 2 * ((FLT_CYCLE + 3) - (FLT_CYCLE + 3) % (CLK_DIV + 1))
+	 *
+	 * clk_cycle := TSCLK_L + TSCLK_H
+	 * temp := (FPCLK / FI2C) - (FLT_CYCLE + 3) * 2
+	 *
 	 * Constraints: 4 <= temp, 0 <= CLK_DIV < 256, 2 <= clk_cycle <= 510
 	 *
 	 * To split SCL clock into low, high periods appropriately, one
@@ -352,11 +369,19 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings)
 	 *
 	 */
 	t_ftl_cycle = (readl(i2c->regs + HSI2C_CONF) >> 16) & 0x7;
-	temp = clkin / op_clk - 8 - t_ftl_cycle;
+	if (i2c->variant->hw == I2C_TYPE_EXYNOS8895)
+		temp = clkin / op_clk - (t_ftl_cycle + 3) * 2;
+	else
+		temp = clkin / op_clk - 8 - t_ftl_cycle;
 	if (i2c->variant->hw != I2C_TYPE_EXYNOS7)
 		temp -= t_ftl_cycle;
 	div = temp / 512;
-	clk_cycle = temp / (div + 1) - 2;
+
+	if (i2c->variant->hw == I2C_TYPE_EXYNOS8895)
+		clk_cycle = (temp + ((t_ftl_cycle + 3) % (div + 1)) * 2) /
+			    (div + 1) - 2;
+	else
+		clk_cycle = temp / (div + 1) - 2;
 	if (temp < 4 || div >= 256 || clk_cycle < 2) {
 		dev_err(i2c->dev, "%s clock set-up failed\n",
 			hs_timings ? "HS" : "FS");
@@ -491,6 +516,8 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id)
 	switch (i2c->variant->hw) {
 	case I2C_TYPE_EXYNOSAUTOV9:
 		fallthrough;
+	case I2C_TYPE_EXYNOS8895:
+		fallthrough;
 	case I2C_TYPE_EXYNOS7:
 		if (int_status & HSI2C_INT_TRANS_DONE) {
 			i2c->trans_done = 1;
-- 
2.43.0

Re: [PATCH v2 1/2] dt-bindings: i2c: exynos5: Add samsung,exynos8895-hsi2c compatible

[Krzysztof Kozlowski]

On 21/12/2024 16:19, Ivaylo Ivanov wrote:
> Add samsung,exynos8895-hsi2c dedicated compatible for representing
> I2C of Exynos8895 SoC. I2C buses may be implemented both as a part
> of USIv1 and separately.
> 
> Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
> ---

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

Re: [PATCH v2 2/2] i2c: exynos5: Add support for Exynos8895 SoC

[Andi Shyti]

Hi Ivaylo,

On Sat, Dec 21, 2024 at 05:19:37PM +0200, Ivaylo Ivanov wrote:
> Exynos8895 functioning logic mostly follows I2C_TYPE_EXYNOS7, but timing
> and temp calculations are slightly changed according to the following

/changed/different/

> logic:
> 
> FPCLK / FI2C = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 2 *
> ((FLT_CYCLE + 3) - (FLT_CYCLE + 3) % (CLK_DIV + 1))
> 
> temp := (FPCLK / FI2C) - (FLT_CYCLE + 3) * 2
> 

...

> @@ -352,11 +369,19 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings)
>  	 *
>  	 */
>  	t_ftl_cycle = (readl(i2c->regs + HSI2C_CONF) >> 16) & 0x7;
> -	temp = clkin / op_clk - 8 - t_ftl_cycle;
> +	if (i2c->variant->hw == I2C_TYPE_EXYNOS8895)
> +		temp = clkin / op_clk - (t_ftl_cycle + 3) * 2;
> +	else
> +		temp = clkin / op_clk - 8 - t_ftl_cycle;
>  	if (i2c->variant->hw != I2C_TYPE_EXYNOS7)
>  		temp -= t_ftl_cycle;

Could you please make this:

	if (i2c->variant->hw == I2C_TYPE_EXYNOS8895)
		...
	else if (i2c->variant->hw == I2C_TYPE_EXYNOS7)
		...
	else
		...

For a better clarity.

Thanks,
Andi

Re: [PATCH v2 2/2] i2c: exynos5: Add support for Exynos8895 SoC

[Ivaylo Ivanov]

On 12/26/24 00:59, Andi Shyti wrote:
> Hi Ivaylo,
>
> On Sat, Dec 21, 2024 at 05:19:37PM +0200, Ivaylo Ivanov wrote:
>> Exynos8895 functioning logic mostly follows I2C_TYPE_EXYNOS7, but timing
>> and temp calculations are slightly changed according to the following
> /changed/different/

Sure.

>
>> logic:
>>
>> FPCLK / FI2C = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 2 *
>> ((FLT_CYCLE + 3) - (FLT_CYCLE + 3) % (CLK_DIV + 1))
>>
>> temp := (FPCLK / FI2C) - (FLT_CYCLE + 3) * 2
>>
> ...
>
>> @@ -352,11 +369,19 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings)
>>  	 *
>>  	 */
>>  	t_ftl_cycle = (readl(i2c->regs + HSI2C_CONF) >> 16) & 0x7;
>> -	temp = clkin / op_clk - 8 - t_ftl_cycle;
>> +	if (i2c->variant->hw == I2C_TYPE_EXYNOS8895)
>> +		temp = clkin / op_clk - (t_ftl_cycle + 3) * 2;
>> +	else
>> +		temp = clkin / op_clk - 8 - t_ftl_cycle;
>>  	if (i2c->variant->hw != I2C_TYPE_EXYNOS7)
>>  		temp -= t_ftl_cycle;
> Could you please make this:
>
> 	if (i2c->variant->hw == I2C_TYPE_EXYNOS8895)
> 		...
> 	else if (i2c->variant->hw == I2C_TYPE_EXYNOS7)
> 		...
> 	else
> 		...
>
> For a better clarity.

Alright. Will post a v3 soon.

Thanks!
Best regards, Ivo.

>
> Thanks,
> Andi