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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc9d444csm60664785ad.137.2024.12.22.13.12.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 22 Dec 2024 13:12:05 -0800 (PST) Date: Mon, 23 Dec 2024 06:12:03 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Niklas Cassel Cc: Lorenzo Pieralisi , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Damien Le Moal , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: Re: [PATCH] PCI: dw-rockchip: Enumerate endpoints based on dll_link_up irq in the combined sys irq Message-ID: <20241222211203.GC3111282@rocinante> References: <20241127145041.3531400-2-cassel@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241127145041.3531400-2-cassel@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241222_131207_644710_5CA3CF6B X-CRM114-Status: GOOD ( 12.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello, > Most boards using the pcie-dw-rockchip PCIe controller lack standard > hotplug support. > > Thus, when an endpoint is attached to the SoC, users have to rescan the bus > manually to enumerate the device. This can be avoided by using the > 'dll_link_up' interrupt in the combined system interrupt 'sys'. > > Once the 'dll_link_up' irq is received, the bus underneath the host bridge > is scanned to enumerate PCIe endpoint devices. > > This commit implements the same functionality that was implemented in the > DWC based pcie-qcom driver in commit 4581403f6792 ("PCI: qcom: Enumerate > endpoints based on Link up event in 'global_irq' interrupt"). > > The Root Complex specific device tree binding for pcie-dw-rockchip already > has the 'sys' interrupt marked as required, so there is no need to update > the device tree binding. This also means that we can request the 'sys' IRQ > unconditionally. Applied to controller/rockchip, thank you! [01/01] PCI: dw-rockchip: Enumerate endpoints based on dll_link_up IRQ in the combined sys IRQ https://git.kernel.org/pci/pci/c/191b732176e7 Krzysztof