* [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
@ 2025-01-05 14:26 Christian Marangi
2025-01-05 14:26 ` [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver Christian Marangi
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Christian Marangi @ 2025-01-05 14:26 UTC (permalink / raw)
To: Rafael J. Wysocki, Viresh Kumar, Ulf Hansson, Matthias Brugger,
AngeloGioacchino Del Regno, Christian Marangi, linux-kernel,
linux-pm, linux-arm-kernel, linux-mediatek, upstream
Add Airoha CPU PM Domain support to control frequency and power of CPU
present on Airoha EN7581 SoC.
Frequency and power can be controlled with the use of the SMC command by
passing the performance state. The driver also expose a read-only clock
that expose the current CPU frequency with SMC command.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
Changes v9:
- Fix compile error targetting wrong branch (remove_new change)
Changes v8:
- Add this patch
- Use SMC invoke instead of 1.2
drivers/pmdomain/mediatek/Kconfig | 11 ++
drivers/pmdomain/mediatek/Makefile | 1 +
.../pmdomain/mediatek/airoha-cpu-pmdomain.c | 144 ++++++++++++++++++
3 files changed, 156 insertions(+)
create mode 100644 drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
diff --git a/drivers/pmdomain/mediatek/Kconfig b/drivers/pmdomain/mediatek/Kconfig
index 21305c4f17fe..049e599a5b57 100644
--- a/drivers/pmdomain/mediatek/Kconfig
+++ b/drivers/pmdomain/mediatek/Kconfig
@@ -26,4 +26,15 @@ config MTK_SCPSYS_PM_DOMAINS
Control Processor System (SCPSYS) has several power management related
tasks in the system.
+config AIROHA_CPU_PM_DOMAIN
+ tristate "Airoha CPU power domain"
+ default ARCH_AIROHA
+ depends on PM
+ select PM_GENERIC_DOMAINS
+ help
+ Say y here to enable CPU power domain support for Airoha SoC.
+
+ CPU frequency and power is controlled by ATF with SMC command to
+ set performance states.
+
endmenu
diff --git a/drivers/pmdomain/mediatek/Makefile b/drivers/pmdomain/mediatek/Makefile
index 8cde09e654b3..0f6edce9239b 100644
--- a/drivers/pmdomain/mediatek/Makefile
+++ b/drivers/pmdomain/mediatek/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o
obj-$(CONFIG_MTK_SCPSYS_PM_DOMAINS) += mtk-pm-domains.o
+obj-$(CONFIG_AIROHA_CPU_PM_DOMAIN) += airoha-cpu-pmdomain.o
diff --git a/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c b/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
new file mode 100644
index 000000000000..0fd88d2f9ac2
--- /dev/null
+++ b/drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c
@@ -0,0 +1,144 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/arm-smccc.h>
+#include <linux/bitfield.h>
+#include <linux/clk-provider.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+#include <linux/slab.h>
+
+#define AIROHA_SIP_AVS_HANDLE 0x82000301
+#define AIROHA_AVS_OP_BASE 0xddddddd0
+#define AIROHA_AVS_OP_MASK GENMASK(1, 0)
+#define AIROHA_AVS_OP_FREQ_DYN_ADJ (AIROHA_AVS_OP_BASE | \
+ FIELD_PREP(AIROHA_AVS_OP_MASK, 0x1))
+#define AIROHA_AVS_OP_GET_FREQ (AIROHA_AVS_OP_BASE | \
+ FIELD_PREP(AIROHA_AVS_OP_MASK, 0x2))
+
+struct airoha_cpu_pmdomain_priv {
+ struct clk_hw hw;
+ struct generic_pm_domain pd;
+};
+
+static long airoha_cpu_pmdomain_clk_round(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+{
+ return rate;
+}
+
+static unsigned long airoha_cpu_pmdomain_clk_get(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
+ 0, 0, 0, 0, 0, 0, &res);
+
+ /* SMCCC returns freq in MHz */
+ return (int)(res.a0 * 1000 * 1000);
+}
+
+/* Airoha CPU clk SMCC is always enabled */
+static int airoha_cpu_pmdomain_clk_is_enabled(struct clk_hw *hw)
+{
+ return true;
+}
+
+static const struct clk_ops airoha_cpu_pmdomain_clk_ops = {
+ .recalc_rate = airoha_cpu_pmdomain_clk_get,
+ .is_enabled = airoha_cpu_pmdomain_clk_is_enabled,
+ .round_rate = airoha_cpu_pmdomain_clk_round,
+};
+
+static int airoha_cpu_pmdomain_set_performance_state(struct generic_pm_domain *domain,
+ unsigned int state)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_FREQ_DYN_ADJ,
+ 0, state, 0, 0, 0, 0, &res);
+
+ /* SMC signal correct apply by unsetting BIT 0 */
+ return res.a0 & BIT(0) ? -EINVAL : 0;
+}
+
+static int airoha_cpu_pmdomain_probe(struct platform_device *pdev)
+{
+ struct airoha_cpu_pmdomain_priv *priv;
+ struct device *dev = &pdev->dev;
+ const struct clk_init_data init = {
+ .name = "cpu",
+ .ops = &airoha_cpu_pmdomain_clk_ops,
+ /* Clock with no set_rate, can't cache */
+ .flags = CLK_GET_RATE_NOCACHE,
+ };
+ struct generic_pm_domain *pd;
+ int ret;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ /* Init and register a get-only clk for Cpufreq */
+ priv->hw.init = &init;
+ ret = devm_clk_hw_register(dev, &priv->hw);
+ if (ret)
+ return ret;
+
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
+ &priv->hw);
+ if (ret)
+ return ret;
+
+ /* Init and register a PD for CPU */
+ pd = &priv->pd;
+ pd->name = "cpu_pd";
+ pd->flags = GENPD_FLAG_ALWAYS_ON;
+ pd->set_performance_state = airoha_cpu_pmdomain_set_performance_state;
+
+ ret = pm_genpd_init(pd, NULL, false);
+ if (ret)
+ return ret;
+
+ ret = of_genpd_add_provider_simple(dev->of_node, pd);
+ if (ret)
+ goto err_add_provider;
+
+ platform_set_drvdata(pdev, priv);
+
+ return 0;
+
+err_add_provider:
+ pm_genpd_remove(pd);
+
+ return ret;
+}
+
+static void airoha_cpu_pmdomain_remove(struct platform_device *pdev)
+{
+ struct airoha_cpu_pmdomain_priv *priv = platform_get_drvdata(pdev);
+
+ of_genpd_del_provider(pdev->dev.of_node);
+ pm_genpd_remove(&priv->pd);
+}
+
+static const struct of_device_id airoha_cpu_pmdomain_of_match[] = {
+ { .compatible = "airoha,en7581-cpufreq" },
+ { },
+};
+MODULE_DEVICE_TABLE(of, airoha_cpu_pmdomain_of_match);
+
+static struct platform_driver airoha_cpu_pmdomain_driver = {
+ .probe = airoha_cpu_pmdomain_probe,
+ .remove = airoha_cpu_pmdomain_remove,
+ .driver = {
+ .name = "airoha-cpu-pmdomain",
+ .of_match_table = airoha_cpu_pmdomain_of_match,
+ },
+};
+module_platform_driver(airoha_cpu_pmdomain_driver);
+
+MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
+MODULE_DESCRIPTION("CPU PM domain driver for Airoha SoCs");
+MODULE_LICENSE("GPL");
--
2.45.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver
2025-01-05 14:26 [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support Christian Marangi
@ 2025-01-05 14:26 ` Christian Marangi
2025-01-08 5:08 ` [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support kernel test robot
2025-01-08 12:31 ` kernel test robot
2 siblings, 0 replies; 4+ messages in thread
From: Christian Marangi @ 2025-01-05 14:26 UTC (permalink / raw)
To: Rafael J. Wysocki, Viresh Kumar, Ulf Hansson, Matthias Brugger,
AngeloGioacchino Del Regno, Christian Marangi, linux-kernel,
linux-pm, linux-arm-kernel, linux-mediatek, upstream
Add simple CPU Freq driver for Airoha EN7581 SoC that control CPU
frequency scaling with SMC APIs and register a generic "cpufreq-dt"
device.
All CPU share the same frequency and can't be controlled independently.
CPU frequency is controlled by the attached PM domain.
Add SoC compatible to cpufreq-dt-plat block list as a dedicated cpufreq
driver is needed with OPP v2 nodes declared in DTS.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
Changes v9:
- Fix compile error targetting wrong branch (remove_new change and new PM OPs)
Changes v8:
- Split in dedicated PM domain driver
Changes v7:
- No changes
Changes v6:
- Improve Kconfig depends logic
- Select PM (PM_GENERIC_DOMAINS depends on it)
- Drop (int) cast for
Changes v5:
- Rename cpu_pd to perf for power domain name
- Use remove instead of remove_new
Changes v4:
- Rework to clk-only + PM set_performance_state implementation
Changes v3:
- Adapt to new cpufreq-dt APIs
- Register cpufreq-dt instead of custom freq driver
Changes v2:
- Fix kernel bot error with missing slab.h and bitfield.h header
- Limit COMPILE_TEST to ARM64 due to smcc 1.2
drivers/cpufreq/Kconfig.arm | 8 ++
drivers/cpufreq/Makefile | 1 +
drivers/cpufreq/airoha-cpufreq.c | 152 +++++++++++++++++++++++++++
drivers/cpufreq/cpufreq-dt-platdev.c | 2 +
4 files changed, 163 insertions(+)
create mode 100644 drivers/cpufreq/airoha-cpufreq.c
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 5f7e13e60c80..704e84d00639 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -15,6 +15,14 @@ config ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM
To compile this driver as a module, choose M here: the
module will be called sun50i-cpufreq-nvmem.
+config ARM_AIROHA_SOC_CPUFREQ
+ tristate "Airoha EN7581 SoC CPUFreq support"
+ depends on ARCH_AIROHA || COMPILE_TEST
+ select PM_OPP
+ default ARCH_AIROHA
+ help
+ This adds the CPUFreq driver for Airoha EN7581 SoCs.
+
config ARM_APPLE_SOC_CPUFREQ
tristate "Apple Silicon SoC CPUFreq support"
depends on ARCH_APPLE || (COMPILE_TEST && 64BIT)
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index d35a28dd9463..890fff99f37d 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_X86_AMD_FREQ_SENSITIVITY) += amd_freq_sensitivity.o
##################################################################################
# ARM SoC drivers
+obj-$(CONFIG_ARM_AIROHA_SOC_CPUFREQ) += airoha-cpufreq.o
obj-$(CONFIG_ARM_APPLE_SOC_CPUFREQ) += apple-soc-cpufreq.o
obj-$(CONFIG_ARM_ARMADA_37XX_CPUFREQ) += armada-37xx-cpufreq.o
obj-$(CONFIG_ARM_ARMADA_8K_CPUFREQ) += armada-8k-cpufreq.o
diff --git a/drivers/cpufreq/airoha-cpufreq.c b/drivers/cpufreq/airoha-cpufreq.c
new file mode 100644
index 000000000000..4fe39eadd163
--- /dev/null
+++ b/drivers/cpufreq/airoha-cpufreq.c
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/bitfield.h>
+#include <linux/cpufreq.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+
+#include "cpufreq-dt.h"
+
+struct airoha_cpufreq_priv {
+ int opp_token;
+ struct dev_pm_domain_list *pd_list;
+ struct platform_device *cpufreq_dt;
+};
+
+static struct platform_device *cpufreq_pdev;
+
+/* NOP function to disable OPP from setting clock */
+static int airoha_cpufreq_config_clks_nop(struct device *dev,
+ struct opp_table *opp_table,
+ struct dev_pm_opp *opp,
+ void *data, bool scaling_down)
+{
+ return 0;
+}
+
+static const char * const airoha_cpufreq_clk_names[] = { "cpu", NULL };
+static const char * const airoha_cpufreq_pd_names[] = { "perf" };
+
+static int airoha_cpufreq_probe(struct platform_device *pdev)
+{
+ const struct dev_pm_domain_attach_data attach_data = {
+ .pd_names = airoha_cpufreq_pd_names,
+ .num_pd_names = ARRAY_SIZE(airoha_cpufreq_pd_names),
+ .pd_flags = PD_FLAG_DEV_LINK_ON | PD_FLAG_REQUIRED_OPP,
+ };
+ struct dev_pm_opp_config config = {
+ .clk_names = airoha_cpufreq_clk_names,
+ .config_clks = airoha_cpufreq_config_clks_nop,
+ };
+ struct platform_device *cpufreq_dt;
+ struct airoha_cpufreq_priv *priv;
+ struct device *dev = &pdev->dev;
+ struct device *cpu_dev;
+ int ret;
+
+ /* CPUs refer to the same OPP table */
+ cpu_dev = get_cpu_device(0);
+ if (!cpu_dev)
+ return -ENODEV;
+
+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ /* Set OPP table conf with NOP config_clks */
+ priv->opp_token = dev_pm_opp_set_config(cpu_dev, &config);
+ if (priv->opp_token < 0)
+ return dev_err_probe(dev, priv->opp_token, "Failed to set OPP config\n");
+
+ /* Attach PM for OPP */
+ ret = dev_pm_domain_attach_list(cpu_dev, &attach_data,
+ &priv->pd_list);
+ if (ret)
+ goto clear_opp_config;
+
+ cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
+ ret = PTR_ERR_OR_ZERO(cpufreq_dt);
+ if (ret) {
+ dev_err(dev, "failed to create cpufreq-dt device: %d\n", ret);
+ goto detach_pm;
+ }
+
+ priv->cpufreq_dt = cpufreq_dt;
+ platform_set_drvdata(pdev, priv);
+
+ return 0;
+
+detach_pm:
+ dev_pm_domain_detach_list(priv->pd_list);
+clear_opp_config:
+ dev_pm_opp_clear_config(priv->opp_token);
+
+ return ret;
+}
+
+static void airoha_cpufreq_remove(struct platform_device *pdev)
+{
+ struct airoha_cpufreq_priv *priv = platform_get_drvdata(pdev);
+
+ platform_device_unregister(priv->cpufreq_dt);
+
+ dev_pm_domain_detach_list(priv->pd_list);
+
+ dev_pm_opp_clear_config(priv->opp_token);
+}
+
+static struct platform_driver airoha_cpufreq_driver = {
+ .probe = airoha_cpufreq_probe,
+ .remove = airoha_cpufreq_remove,
+ .driver = {
+ .name = "airoha-cpufreq",
+ },
+};
+
+static const struct of_device_id airoha_cpufreq_match_list[] __initconst = {
+ { .compatible = "airoha,en7581" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, airoha_cpufreq_match_list);
+
+static int __init airoha_cpufreq_init(void)
+{
+ struct device_node *np = of_find_node_by_path("/");
+ const struct of_device_id *match;
+ int ret;
+
+ if (!np)
+ return -ENODEV;
+
+ match = of_match_node(airoha_cpufreq_match_list, np);
+ of_node_put(np);
+ if (!match)
+ return -ENODEV;
+
+ ret = platform_driver_register(&airoha_cpufreq_driver);
+ if (unlikely(ret < 0))
+ return ret;
+
+ cpufreq_pdev = platform_device_register_data(NULL, "airoha-cpufreq",
+ -1, match, sizeof(*match));
+ ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
+ if (ret)
+ platform_driver_unregister(&airoha_cpufreq_driver);
+
+ return ret;
+}
+module_init(airoha_cpufreq_init);
+
+static void __exit airoha_cpufreq_exit(void)
+{
+ platform_device_unregister(cpufreq_pdev);
+ platform_driver_unregister(&airoha_cpufreq_driver);
+}
+module_exit(airoha_cpufreq_exit);
+
+MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
+MODULE_DESCRIPTION("CPUfreq driver for Airoha SoCs");
+MODULE_LICENSE("GPL");
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index 9c198bd4f7e9..2aa00769cf09 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -103,6 +103,8 @@ static const struct of_device_id allowlist[] __initconst = {
* platforms using "operating-points-v2" property.
*/
static const struct of_device_id blocklist[] __initconst = {
+ { .compatible = "airoha,en7581", },
+
{ .compatible = "allwinner,sun50i-a100" },
{ .compatible = "allwinner,sun50i-h6", },
{ .compatible = "allwinner,sun50i-h616", },
--
2.45.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
2025-01-05 14:26 [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support Christian Marangi
2025-01-05 14:26 ` [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver Christian Marangi
@ 2025-01-08 5:08 ` kernel test robot
2025-01-08 12:31 ` kernel test robot
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2025-01-08 5:08 UTC (permalink / raw)
To: Christian Marangi, Rafael J. Wysocki, Viresh Kumar, Ulf Hansson,
Matthias Brugger, AngeloGioacchino Del Regno, linux-kernel,
linux-pm, linux-arm-kernel, linux-mediatek, upstream
Cc: oe-kbuild-all
Hi Christian,
kernel test robot noticed the following build errors:
[auto build test ERROR on rafael-pm/linux-next]
[also build test ERROR on rafael-pm/bleeding-edge linus/master v6.13-rc6 next-20250107]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Christian-Marangi/cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver/20250105-223027
base: https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git linux-next
patch link: https://lore.kernel.org/r/20250105142645.20128-1-ansuelsmth%40gmail.com
patch subject: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
config: arm-randconfig-r063-20250108 (https://download.01.org/0day-ci/archive/20250108/202501081205.3pBFrmYH-lkp@intel.com/config)
compiler: clang version 19.1.3 (https://github.com/llvm/llvm-project ab51eccf88f5321e7c60591c5546b254b6afab99)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250108/202501081205.3pBFrmYH-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202501081205.3pBFrmYH-lkp@intel.com/
All errors (new ones prefixed by >>, old ones prefixed by <<):
>> ERROR: modpost: "arm_smccc_1_1_get_conduit" [drivers/pmdomain/mediatek/airoha-cpu-pmdomain.ko] undefined!
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
2025-01-05 14:26 [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support Christian Marangi
2025-01-05 14:26 ` [PATCH v9 2/2] cpufreq: airoha: Add EN7581 CPUFreq SMCCC driver Christian Marangi
2025-01-08 5:08 ` [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support kernel test robot
@ 2025-01-08 12:31 ` kernel test robot
2 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2025-01-08 12:31 UTC (permalink / raw)
To: Christian Marangi, Rafael J. Wysocki, Viresh Kumar, Ulf Hansson,
Matthias Brugger, AngeloGioacchino Del Regno, linux-kernel,
linux-pm, linux-arm-kernel, linux-mediatek, upstream
Cc: oe-kbuild-all
Hi Christian,
kernel test robot noticed the following build errors:
[auto build test ERROR on rafael-pm/linux-next]
[also build test ERROR on rafael-pm/bleeding-edge linus/master v6.13-rc6 next-20250107]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Christian-Marangi/cpufreq-airoha-Add-EN7581-CPUFreq-SMCCC-driver/20250105-223027
base: https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git linux-next
patch link: https://lore.kernel.org/r/20250105142645.20128-1-ansuelsmth%40gmail.com
patch subject: [PATCH v9 1/2] pmdomain: airoha: Add Airoha CPU PM Domain support
config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20250108/202501082018.EFwpqIgM-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250108/202501082018.EFwpqIgM-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202501082018.EFwpqIgM-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:3:
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c: In function 'airoha_cpu_pmdomain_clk_get':
>> include/linux/arm-smccc.h:591:49: error: expected string literal before 'SMCCC_HVC_INST'
591 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~
include/linux/arm-smccc.h:552:30: note: in definition of macro '__arm_smccc_1_1'
552 | asm volatile(inst "\n" : \
| ^~~~
include/linux/arm-smccc.h:629:25: note: in expansion of macro 'arm_smccc_1_1_hvc'
629 | arm_smccc_1_1_hvc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:537:29: warning: unused variable 'arg7' [-Wunused-variable]
537 | register typeof(a7) arg7 asm("r7") = __a7
| ^~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
| ^~~~~~~~
include/linux/arm-smccc.h:550:17: note: in expansion of macro 'CONCATENATE'
550 | CONCATENATE(__declare_arg_, \
| ^~~~~~~~~~~
include/linux/arm-smccc.h:591:33: note: in expansion of macro '__arm_smccc_1_1'
591 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:629:25: note: in expansion of macro 'arm_smccc_1_1_hvc'
629 | arm_smccc_1_1_hvc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:532:29: warning: unused variable 'arg6' [-Wunused-variable]
532 | register typeof(a6) arg6 asm("r6") = __a6
| ^~~~
include/linux/arm-smccc.h:536:9: note: in expansion of macro '__declare_arg_8'
536 | __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
| ^~~~~~~~~~~~~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
| ^~~~~~~~
include/linux/arm-smccc.h:550:17: note: in expansion of macro 'CONCATENATE'
550 | CONCATENATE(__declare_arg_, \
| ^~~~~~~~~~~
include/linux/arm-smccc.h:591:33: note: in expansion of macro '__arm_smccc_1_1'
591 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:629:25: note: in expansion of macro 'arm_smccc_1_1_hvc'
629 | arm_smccc_1_1_hvc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:527:29: warning: unused variable 'arg5' [-Wunused-variable]
527 | register typeof(a5) arg5 asm("r5") = __a5
| ^~~~
include/linux/arm-smccc.h:531:9: note: in expansion of macro '__declare_arg_7'
531 | __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:536:9: note: in expansion of macro '__declare_arg_8'
536 | __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
| ^~~~~~~~~~~~~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
| ^~~~~~~~
include/linux/arm-smccc.h:550:17: note: in expansion of macro 'CONCATENATE'
550 | CONCATENATE(__declare_arg_, \
| ^~~~~~~~~~~
include/linux/arm-smccc.h:591:33: note: in expansion of macro '__arm_smccc_1_1'
591 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:629:25: note: in expansion of macro 'arm_smccc_1_1_hvc'
629 | arm_smccc_1_1_hvc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:522:29: warning: unused variable 'arg4' [-Wunused-variable]
522 | register typeof(a4) arg4 asm("r4") = __a4
| ^~~~
include/linux/arm-smccc.h:526:9: note: in expansion of macro '__declare_arg_6'
526 | __declare_arg_6(a0, a1, a2, a3, a4, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:531:9: note: in expansion of macro '__declare_arg_7'
531 | __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:536:9: note: in expansion of macro '__declare_arg_8'
536 | __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
| ^~~~~~~~~~~~~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
--
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:516:29: warning: unused variable 'arg2' [-Wunused-variable]
516 | register typeof(a2) arg2 asm("r2") = __a2; \
| ^~~~
include/linux/arm-smccc.h:521:9: note: in expansion of macro '__declare_arg_5'
521 | __declare_arg_5(a0, a1, a2, a3, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:526:9: note: in expansion of macro '__declare_arg_6'
526 | __declare_arg_6(a0, a1, a2, a3, a4, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:531:9: note: in expansion of macro '__declare_arg_7'
531 | __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:536:9: note: in expansion of macro '__declare_arg_8'
536 | __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
| ^~~~~~~~~~~~~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
| ^~~~~~~~
include/linux/arm-smccc.h:550:17: note: in expansion of macro 'CONCATENATE'
550 | CONCATENATE(__declare_arg_, \
| ^~~~~~~~~~~
include/linux/arm-smccc.h:591:33: note: in expansion of macro '__arm_smccc_1_1'
591 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:629:25: note: in expansion of macro 'arm_smccc_1_1_hvc'
629 | arm_smccc_1_1_hvc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:515:29: warning: unused variable 'arg1' [-Wunused-variable]
515 | register typeof(a1) arg1 asm("r1") = __a1; \
| ^~~~
include/linux/arm-smccc.h:521:9: note: in expansion of macro '__declare_arg_5'
521 | __declare_arg_5(a0, a1, a2, a3, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:526:9: note: in expansion of macro '__declare_arg_6'
526 | __declare_arg_6(a0, a1, a2, a3, a4, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:531:9: note: in expansion of macro '__declare_arg_7'
531 | __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:536:9: note: in expansion of macro '__declare_arg_8'
536 | __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
| ^~~~~~~~~~~~~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
| ^~~~~~~~
include/linux/arm-smccc.h:550:17: note: in expansion of macro 'CONCATENATE'
550 | CONCATENATE(__declare_arg_, \
| ^~~~~~~~~~~
include/linux/arm-smccc.h:591:33: note: in expansion of macro '__arm_smccc_1_1'
591 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:629:25: note: in expansion of macro 'arm_smccc_1_1_hvc'
629 | arm_smccc_1_1_hvc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:514:32: warning: unused variable 'arg0' [-Wunused-variable]
514 | register unsigned long arg0 asm("r0") = (u32)a0; \
| ^~~~
include/linux/arm-smccc.h:521:9: note: in expansion of macro '__declare_arg_5'
521 | __declare_arg_5(a0, a1, a2, a3, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:526:9: note: in expansion of macro '__declare_arg_6'
526 | __declare_arg_6(a0, a1, a2, a3, a4, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:531:9: note: in expansion of macro '__declare_arg_7'
531 | __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:536:9: note: in expansion of macro '__declare_arg_8'
536 | __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
| ^~~~~~~~~~~~~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
| ^~~~~~~~
include/linux/arm-smccc.h:550:17: note: in expansion of macro 'CONCATENATE'
550 | CONCATENATE(__declare_arg_, \
| ^~~~~~~~~~~
include/linux/arm-smccc.h:591:33: note: in expansion of macro '__arm_smccc_1_1'
591 | #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:629:25: note: in expansion of macro 'arm_smccc_1_1_hvc'
629 | arm_smccc_1_1_hvc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
>> include/linux/arm-smccc.h:575:49: error: expected string literal before 'SMCCC_SMC_INST'
575 | #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~
include/linux/arm-smccc.h:552:30: note: in definition of macro '__arm_smccc_1_1'
552 | asm volatile(inst "\n" : \
| ^~~~
include/linux/arm-smccc.h:632:25: note: in expansion of macro 'arm_smccc_1_1_smc'
632 | arm_smccc_1_1_smc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:537:29: warning: unused variable 'arg7' [-Wunused-variable]
537 | register typeof(a7) arg7 asm("r7") = __a7
| ^~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
| ^~~~~~~~
include/linux/arm-smccc.h:550:17: note: in expansion of macro 'CONCATENATE'
550 | CONCATENATE(__declare_arg_, \
| ^~~~~~~~~~~
include/linux/arm-smccc.h:575:33: note: in expansion of macro '__arm_smccc_1_1'
575 | #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:632:25: note: in expansion of macro 'arm_smccc_1_1_smc'
632 | arm_smccc_1_1_smc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:532:29: warning: unused variable 'arg6' [-Wunused-variable]
532 | register typeof(a6) arg6 asm("r6") = __a6
| ^~~~
include/linux/arm-smccc.h:536:9: note: in expansion of macro '__declare_arg_8'
536 | __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
| ^~~~~~~~~~~~~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
| ^~~~~~~~
include/linux/arm-smccc.h:550:17: note: in expansion of macro 'CONCATENATE'
550 | CONCATENATE(__declare_arg_, \
| ^~~~~~~~~~~
include/linux/arm-smccc.h:575:33: note: in expansion of macro '__arm_smccc_1_1'
575 | #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:632:25: note: in expansion of macro 'arm_smccc_1_1_smc'
632 | arm_smccc_1_1_smc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:527:29: warning: unused variable 'arg5' [-Wunused-variable]
527 | register typeof(a5) arg5 asm("r5") = __a5
| ^~~~
include/linux/arm-smccc.h:531:9: note: in expansion of macro '__declare_arg_7'
531 | __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:536:9: note: in expansion of macro '__declare_arg_8'
536 | __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
| ^~~~~~~~~~~~~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
| ^~~~~~~~
include/linux/arm-smccc.h:550:17: note: in expansion of macro 'CONCATENATE'
550 | CONCATENATE(__declare_arg_, \
| ^~~~~~~~~~~
include/linux/arm-smccc.h:575:33: note: in expansion of macro '__arm_smccc_1_1'
575 | #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:632:25: note: in expansion of macro 'arm_smccc_1_1_smc'
632 | arm_smccc_1_1_smc(__VA_ARGS__); \
| ^~~~~~~~~~~~~~~~~
drivers/pmdomain/mediatek/airoha-cpu-pmdomain.c:35:9: note: in expansion of macro 'arm_smccc_1_1_invoke'
35 | arm_smccc_1_1_invoke(AIROHA_SIP_AVS_HANDLE, AIROHA_AVS_OP_GET_FREQ,
| ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:522:29: warning: unused variable 'arg4' [-Wunused-variable]
522 | register typeof(a4) arg4 asm("r4") = __a4
| ^~~~
include/linux/arm-smccc.h:526:9: note: in expansion of macro '__declare_arg_6'
526 | __declare_arg_6(a0, a1, a2, a3, a4, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:531:9: note: in expansion of macro '__declare_arg_7'
531 | __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
| ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:536:9: note: in expansion of macro '__declare_arg_8'
536 | __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
| ^~~~~~~~~~~~~~~
include/linux/args.h:25:24: note: in expansion of macro '__declare_arg_9'
25 | #define __CONCAT(a, b) a ## b
| ^
include/linux/args.h:26:27: note: in expansion of macro '__CONCAT'
26 | #define CONCATENATE(a, b) __CONCAT(a, b)
..
vim +/SMCCC_HVC_INST +591 include/linux/arm-smccc.h
f2d3b2e8759a58 Marc Zyngier 2018-02-06 490
90e3e18548e6a8 Andy Shevchenko 2023-07-19 491 #define __declare_arg_2(a0, res) \
f2d3b2e8759a58 Marc Zyngier 2018-02-06 492 struct arm_smccc_res *___res = res; \
0794a974d74dc7 Andrew Scull 2020-09-15 493 register unsigned long arg0 asm("r0") = (u32)a0
f2d3b2e8759a58 Marc Zyngier 2018-02-06 494
90e3e18548e6a8 Andy Shevchenko 2023-07-19 495 #define __declare_arg_3(a0, a1, res) \
755a8bf5579d22 Marc Zyngier 2018-08-24 496 typeof(a1) __a1 = a1; \
f2d3b2e8759a58 Marc Zyngier 2018-02-06 497 struct arm_smccc_res *___res = res; \
0794a974d74dc7 Andrew Scull 2020-09-15 498 register unsigned long arg0 asm("r0") = (u32)a0; \
0794a974d74dc7 Andrew Scull 2020-09-15 499 register typeof(a1) arg1 asm("r1") = __a1
f2d3b2e8759a58 Marc Zyngier 2018-02-06 500
90e3e18548e6a8 Andy Shevchenko 2023-07-19 501 #define __declare_arg_4(a0, a1, a2, res) \
755a8bf5579d22 Marc Zyngier 2018-08-24 502 typeof(a1) __a1 = a1; \
755a8bf5579d22 Marc Zyngier 2018-08-24 503 typeof(a2) __a2 = a2; \
f2d3b2e8759a58 Marc Zyngier 2018-02-06 504 struct arm_smccc_res *___res = res; \
0794a974d74dc7 Andrew Scull 2020-09-15 505 register unsigned long arg0 asm("r0") = (u32)a0; \
0794a974d74dc7 Andrew Scull 2020-09-15 506 register typeof(a1) arg1 asm("r1") = __a1; \
0794a974d74dc7 Andrew Scull 2020-09-15 507 register typeof(a2) arg2 asm("r2") = __a2
f2d3b2e8759a58 Marc Zyngier 2018-02-06 508
90e3e18548e6a8 Andy Shevchenko 2023-07-19 509 #define __declare_arg_5(a0, a1, a2, a3, res) \
755a8bf5579d22 Marc Zyngier 2018-08-24 510 typeof(a1) __a1 = a1; \
755a8bf5579d22 Marc Zyngier 2018-08-24 511 typeof(a2) __a2 = a2; \
755a8bf5579d22 Marc Zyngier 2018-08-24 512 typeof(a3) __a3 = a3; \
f2d3b2e8759a58 Marc Zyngier 2018-02-06 513 struct arm_smccc_res *___res = res; \
0794a974d74dc7 Andrew Scull 2020-09-15 514 register unsigned long arg0 asm("r0") = (u32)a0; \
0794a974d74dc7 Andrew Scull 2020-09-15 515 register typeof(a1) arg1 asm("r1") = __a1; \
0794a974d74dc7 Andrew Scull 2020-09-15 516 register typeof(a2) arg2 asm("r2") = __a2; \
0794a974d74dc7 Andrew Scull 2020-09-15 517 register typeof(a3) arg3 asm("r3") = __a3
f2d3b2e8759a58 Marc Zyngier 2018-02-06 518
90e3e18548e6a8 Andy Shevchenko 2023-07-19 519 #define __declare_arg_6(a0, a1, a2, a3, a4, res) \
755a8bf5579d22 Marc Zyngier 2018-08-24 520 typeof(a4) __a4 = a4; \
90e3e18548e6a8 Andy Shevchenko 2023-07-19 521 __declare_arg_5(a0, a1, a2, a3, res); \
0794a974d74dc7 Andrew Scull 2020-09-15 522 register typeof(a4) arg4 asm("r4") = __a4
f2d3b2e8759a58 Marc Zyngier 2018-02-06 523
90e3e18548e6a8 Andy Shevchenko 2023-07-19 524 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, res) \
755a8bf5579d22 Marc Zyngier 2018-08-24 525 typeof(a5) __a5 = a5; \
90e3e18548e6a8 Andy Shevchenko 2023-07-19 526 __declare_arg_6(a0, a1, a2, a3, a4, res); \
0794a974d74dc7 Andrew Scull 2020-09-15 527 register typeof(a5) arg5 asm("r5") = __a5
f2d3b2e8759a58 Marc Zyngier 2018-02-06 528
90e3e18548e6a8 Andy Shevchenko 2023-07-19 529 #define __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res) \
755a8bf5579d22 Marc Zyngier 2018-08-24 530 typeof(a6) __a6 = a6; \
90e3e18548e6a8 Andy Shevchenko 2023-07-19 531 __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
0794a974d74dc7 Andrew Scull 2020-09-15 532 register typeof(a6) arg6 asm("r6") = __a6
f2d3b2e8759a58 Marc Zyngier 2018-02-06 533
90e3e18548e6a8 Andy Shevchenko 2023-07-19 534 #define __declare_arg_9(a0, a1, a2, a3, a4, a5, a6, a7, res) \
755a8bf5579d22 Marc Zyngier 2018-08-24 535 typeof(a7) __a7 = a7; \
90e3e18548e6a8 Andy Shevchenko 2023-07-19 536 __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
0794a974d74dc7 Andrew Scull 2020-09-15 537 register typeof(a7) arg7 asm("r7") = __a7
f2d3b2e8759a58 Marc Zyngier 2018-02-06 538
f2d3b2e8759a58 Marc Zyngier 2018-02-06 539 /*
f2d3b2e8759a58 Marc Zyngier 2018-02-06 540 * We have an output list that is not necessarily used, and GCC feels
f2d3b2e8759a58 Marc Zyngier 2018-02-06 541 * entitled to optimise the whole sequence away. "volatile" is what
f2d3b2e8759a58 Marc Zyngier 2018-02-06 542 * makes it stick.
f2d3b2e8759a58 Marc Zyngier 2018-02-06 543 */
f2d3b2e8759a58 Marc Zyngier 2018-02-06 544 #define __arm_smccc_1_1(inst, ...) \
f2d3b2e8759a58 Marc Zyngier 2018-02-06 545 do { \
0794a974d74dc7 Andrew Scull 2020-09-15 546 register unsigned long r0 asm("r0"); \
0794a974d74dc7 Andrew Scull 2020-09-15 547 register unsigned long r1 asm("r1"); \
0794a974d74dc7 Andrew Scull 2020-09-15 548 register unsigned long r2 asm("r2"); \
0794a974d74dc7 Andrew Scull 2020-09-15 549 register unsigned long r3 asm("r3"); \
90e3e18548e6a8 Andy Shevchenko 2023-07-19 550 CONCATENATE(__declare_arg_, \
90e3e18548e6a8 Andy Shevchenko 2023-07-19 551 COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
8c462d56487e3a Mark Rutland 2024-11-06 552 asm volatile(inst "\n" : \
0794a974d74dc7 Andrew Scull 2020-09-15 553 "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \
90e3e18548e6a8 Andy Shevchenko 2023-07-19 554 : CONCATENATE(__constraint_read_, \
90e3e18548e6a8 Andy Shevchenko 2023-07-19 555 COUNT_ARGS(__VA_ARGS__)) \
8c462d56487e3a Mark Rutland 2024-11-06 556 : "memory"); \
f2d3b2e8759a58 Marc Zyngier 2018-02-06 557 if (___res) \
f2d3b2e8759a58 Marc Zyngier 2018-02-06 558 *___res = (typeof(*___res)){r0, r1, r2, r3}; \
f2d3b2e8759a58 Marc Zyngier 2018-02-06 559 } while (0)
f2d3b2e8759a58 Marc Zyngier 2018-02-06 560
f2d3b2e8759a58 Marc Zyngier 2018-02-06 561 /*
f2d3b2e8759a58 Marc Zyngier 2018-02-06 562 * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
f2d3b2e8759a58 Marc Zyngier 2018-02-06 563 *
f2d3b2e8759a58 Marc Zyngier 2018-02-06 564 * This is a variadic macro taking one to eight source arguments, and
f2d3b2e8759a58 Marc Zyngier 2018-02-06 565 * an optional return structure.
f2d3b2e8759a58 Marc Zyngier 2018-02-06 566 *
f2d3b2e8759a58 Marc Zyngier 2018-02-06 567 * @a0-a7: arguments passed in registers 0 to 7
f2d3b2e8759a58 Marc Zyngier 2018-02-06 568 * @res: result values from registers 0 to 3
f2d3b2e8759a58 Marc Zyngier 2018-02-06 569 *
f2d3b2e8759a58 Marc Zyngier 2018-02-06 570 * This macro is used to make SMC calls following SMC Calling Convention v1.1.
f2d3b2e8759a58 Marc Zyngier 2018-02-06 571 * The content of the supplied param are copied to registers 0 to 7 prior
f2d3b2e8759a58 Marc Zyngier 2018-02-06 572 * to the SMC instruction. The return values are updated with the content
f2d3b2e8759a58 Marc Zyngier 2018-02-06 573 * from register 0 to 3 on return from the SMC instruction if not NULL.
f2d3b2e8759a58 Marc Zyngier 2018-02-06 574 */
f2d3b2e8759a58 Marc Zyngier 2018-02-06 @575 #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
f2d3b2e8759a58 Marc Zyngier 2018-02-06 576
f2d3b2e8759a58 Marc Zyngier 2018-02-06 577 /*
f2d3b2e8759a58 Marc Zyngier 2018-02-06 578 * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
f2d3b2e8759a58 Marc Zyngier 2018-02-06 579 *
f2d3b2e8759a58 Marc Zyngier 2018-02-06 580 * This is a variadic macro taking one to eight source arguments, and
f2d3b2e8759a58 Marc Zyngier 2018-02-06 581 * an optional return structure.
f2d3b2e8759a58 Marc Zyngier 2018-02-06 582 *
f2d3b2e8759a58 Marc Zyngier 2018-02-06 583 * @a0-a7: arguments passed in registers 0 to 7
f2d3b2e8759a58 Marc Zyngier 2018-02-06 584 * @res: result values from registers 0 to 3
f2d3b2e8759a58 Marc Zyngier 2018-02-06 585 *
f2d3b2e8759a58 Marc Zyngier 2018-02-06 586 * This macro is used to make HVC calls following SMC Calling Convention v1.1.
f2d3b2e8759a58 Marc Zyngier 2018-02-06 587 * The content of the supplied param are copied to registers 0 to 7 prior
f2d3b2e8759a58 Marc Zyngier 2018-02-06 588 * to the HVC instruction. The return values are updated with the content
f2d3b2e8759a58 Marc Zyngier 2018-02-06 589 * from register 0 to 3 on return from the HVC instruction if not NULL.
f2d3b2e8759a58 Marc Zyngier 2018-02-06 590 */
f2d3b2e8759a58 Marc Zyngier 2018-02-06 @591 #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
f2d3b2e8759a58 Marc Zyngier 2018-02-06 592
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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