From: Alexander Dahl <ada@thorsis.com>
To: "Csókás, Bence" <csokas.bence@prolan.hu>,
linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
"Tudor Ambarus" <tudor.ambarus@microchip.com>,
"Varshini Rajendran" <varshini.rajendran@microchip.com>,
"Mark Brown" <broonie@kernel.org>,
"Nicolas Ferre" <nicolas.ferre@microchip.com>,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
"Claudiu Beznea" <claudiu.beznea@tuxon.dev>,
"Tudor Ambarus" <tudor.ambarus@linaro.org>,
"Jinjie Ruan" <ruanjinjie@huawei.com>
Subject: Re: [PATCH v3 2/2] spi: atmel-quadspi: Add support for sama7g5 QSPI
Date: Fri, 10 Jan 2025 11:40:26 +0100 [thread overview]
Message-ID: <20250110-married-program-83bc1a997ce8@thorsis.com> (raw)
In-Reply-To: <20250109-carat-festivity-5f088e1add3c@thorsis.com>
Hello,
Am Thu, Jan 09, 2025 at 05:27:58PM +0100 schrieb Alexander Dahl:
> Hello Bence,
>
> I had another round of intense looking at the code, this time I
> focused on pm_runtime handling. Although I just learned about the
> basic concepts, I think the ported patch has some mistakes. I'll
> comment here, because I don't have a SAMA7G5 to test, and I'm not
> confident enough to fix the code, but I think it's worth reporting.
> See below.
>
> Am Thu, Nov 28, 2024 at 06:43:15PM +0100 schrieb Csókás, Bence:
> > From: Tudor Ambarus <tudor.ambarus@microchip.com>
> >
[…]
> > + /* Release the chip-select. */
> > + ret = atmel_qspi_reg_sync(aq);
> > + if (ret) {
> > + pm_runtime_mark_last_busy(&aq->pdev->dev);
> > + pm_runtime_put_autosuspend(&aq->pdev->dev);
> > + return ret;
> > + }
> > + atmel_qspi_write(QSPI_CR_LASTXFER, aq, QSPI_CR);
> > +
> > + return atmel_qspi_wait_for_completion(aq, QSPI_SR_CSRA);
> > +}
>
> This function atmel_qspi_sama7g5_transfer() seems to be called from
> atmel_qspi_exec_op() through ops->transfer() only. I think the two
> lines in the error handling of atmel_qspi_reg_sync() lead to
> unbalanced calls of pm_runtime_xxx. Compare with
> atmel_qspi_transfer() which has no calls to pm_runtime, everything is
> covered by atmel_qspi_exec_op() in this case where the pm_runtime
> calls surround ->set_cfg() and ->transfer(). Right?
This problem has been addressed in downstream kernel (linux4sam) by
Claudiu Beznea back in 2023 already:
https://github.com/linux4sam/linux-at91/commit/e59f646f516088fdab6d8213d8acda0c1063ec21
[…]
> The whole call tree from atmel_qspi_sama7g5_setup() downwards is not
> covered by pm_runtime get and put calls, although heavily doing i/o.
> Further down in atmel_qspi_setup() there's a write to QSPI_SCR which
> seems to be handled correctly.
Same for this:
https://github.com/linux4sam/linux-at91/commit/5ff0e74c1d548599fe85113e2f1817cb8a052b15
Some hunks of that seem to have made it to upstream, not sure?
Maybe Microchip should upstream those fixes, now that SAMA7G5 support
was ported to mainline?
Greets
Alex
next prev parent reply other threads:[~2025-01-10 10:42 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-28 17:43 [PATCH v3 0/2] spi: atmel-quadspi: Refactor to allow supporting SAMA7G5 O/QSPI Csókás, Bence
2024-11-28 17:43 ` [PATCH v3 1/2] spi: atmel-quadspi: Create `atmel_qspi_ops` to support newer SoC families Csókás, Bence
2024-11-28 17:43 ` [PATCH v3 2/2] spi: atmel-quadspi: Add support for sama7g5 QSPI Csókás, Bence
2024-12-18 9:32 ` Alexander Dahl
2025-01-09 16:27 ` Alexander Dahl
2025-01-09 16:41 ` Mark Brown
2025-01-10 10:40 ` Alexander Dahl [this message]
2025-01-14 17:13 ` Csókás Bence
2025-01-10 7:56 ` Alexander Dahl
2025-01-14 17:21 ` Csókás Bence
2024-12-17 18:27 ` [PATCH v3 0/2] spi: atmel-quadspi: Refactor to allow supporting SAMA7G5 O/QSPI Mark Brown
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